XC878CLM
Functional Description
Data Sheet
85
V1.1, 2009-08
– Interrupt enabling and corresponding flag
3.13
UART and UART1
The XC878 provides two Universal Asynchronous Receiver/Transmitter (UART and
UART1) modules for full-duplex asynchronous reception/transmission. Both are also
receive-buffered, i.e., they can commence reception of a second byte before a
previously received byte has been read from the receive register. However, if the first
byte still has not been read by the time reception of the second byte is complete, one of
the bytes will be lost.
Features
Full-duplex asynchronous modes
– 8-bit or 9-bit data frames, LSB first
– Fixed or variable baud rate
Receive buffered
Multiprocessor communication
Interrupt generation on the completion of a data transmission or reception
The UART modules can operate in the four modes shown in Table 29.
There are several ways to generate the baud rate clock for the serial port, depending on
the mode in which it is operating. In mode 0, the baud rate for the transfer is fixed at
f
PCLK/2. In mode 2, the baud rate is generated internally based on the UART input clock
and can be configured to either
f
PCLK/32 or fPCLK/64. For UART1 module, only fPCLK/64 is
available. The variable baud rate is set by the underflow rate on the dedicated baud-rate
generator. For UART module, the variable baud rate alternatively can be set by the
overflow rate on Timer 1.
3.13.1
Baud-Rate Generator
Both UART modules have their own dedicated baud-rate generator, which is based on
a programmable 8-bit reload value, and includes divider stages (i.e., prescaler and
Table 29
UART Modes
Operating Mode
Baud Rate
Mode 0: 8-bit shift register
f
PCLK/2
Mode 1: 8-bit shift UART
Variable
Mode 2: 9-bit shift UART
f
PCLK/32 or fPCLK/64
1)
1) For UART1 module, the baud rate is fixed at fPCLK/64.
Mode 3: 9-bit shift UART
Variable