参数资料
型号: SN74LV138APWLE
厂商: TEXAS INSTRUMENTS INC
元件分类: 编、解码器及复用、解复用
英文描述: LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
封装: PLASTIC, TSSOP-16
文件页数: 1/11页
文件大小: 189K
代理商: SN74LV138APWLE
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS395C – APRIL 1998 – REVISED MAY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D 2-V to 5.5-V VCC Operation
D Support Mixed-Mode Voltage Operation on
All Ports
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages,
Ceramic Flat (W) Packages, Chip Carriers
(FK), and DIPs (J)
description
The ’LV138A devices are 3-line to 8-line
decoders/demultiplexers designed for 2-V to
5.5-V VCC operation.
These
devices
are
designed
for
high-
performance memory-decoding or data-routing
applications requiring very short propagation
delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system
decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this
decoder and the enable time of the memory are usually less than the typical access time of the memory. This
means that the effective system delay introduced by the decoder is negligible.
The conditions at the binary-select inputs (A, B, C) and the three enable inputs (G1, G2A, G2B) select one of
eight output lines. The two active-low (G2A, G2B) and one active-high (G1) enable inputs reduce the need for
external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters
and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing
applications.
The SN54LV138A is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74LV138A is characterized for operation from –40
°C to 85°C.
Copyright
2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
EPIC is a trademark of Texas Instruments.
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
NC
Y6
Y5
V
Y0
Y7
GND
NC
SN54LV138A . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54LV138A ...J OR W PACKAGE
SN74LV138A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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