集成电路ADSP-BF533SBBC500

FEATURES Up to 600 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit Shifter RISC-like register and instruction model for ease of programming and compiler-friendly support Advanced debug, trace, and performance monitoring 0.8 V to 1.2 V core VDD with on-chip voltage regulation 3.3 V and 2.5 V tolerant I/O 160-ball mini-BGA, 169-ball lead free PBGA, and 176-lead LQFP packages MEMORY Up to 148K bytes of on-chip memory: 16K bytes of instruction SRAM/Cache 64K bytes of instruction SRAM 32K bytes of data SRAM/Cache 32K bytes of data SRAM 4K bytes of scratchpad SRAM Two dual-channel memory DMA controllers Memory Management Unit providing memory protection

External Memory Controller with glueless support for SDRAM, SRAM, FLASH, and ROM Flexible memory booting options from SPI and external memory PERIPHERALS Parallel Peripheral Interface (PPI)/GPIO, supporting ITU-R 656 video data formats Two dual-channel, full duplex synchronous serial ports, supporting eight stereo I 2 S channels 12-channel DMA controller SPI compatible port Three Timer/Counters with PWM support UART with support for IrDA? Event Handler Real-Time Clock Watchdog Timer Debug/JTAG interface On-chip PLL capable of 1x to 63x frequency multiplICation Core Timer