- 您现在的位置：买卖IC网 > PDF目录382635 > TMS320C6454ZTZ (Texas Instruments, Inc.) Fixed-Point Digital Signal Processor PDF资料下载
参数资料
| 型号： | TMS320C6454ZTZ |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | 数字信号处理 |
| 英文描述： | Fixed-Point Digital Signal Processor |
| 中文描述： | 定点数字信号处理器 |
| 文件页数： | 71/225页 |
| 文件大小： | 1663K |
| 代理商： | TMS320C6454ZTZ |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页当前第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页第185页第186页第187页第188页第189页第190页第191页第192页第193页第194页第195页第196页第197页第198页第199页第200页第201页第202页第203页第204页第205页第206页第207页第208页第209页第210页第211页第212页第213页第214页第215页第216页第217页第218页第219页第220页第221页第222页第223页第224页第225页
www.ti.com
P
4
System Interconnect
4.1 Internal Buses, Bridges, and Switch Fabrics
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A–APRIL 2006–REVISED DECEMBER 2006
On the C6454 device, the C64x+ Megamodule, the EDMA3 transfer controllers, and the system
peripherals are interconnected through two switch fabrics. The switch fabrics allow for low-latency,
concurrent data transfers between master peripherals and slave peripherals. Through a switch fabric the
CPU can send data to the EMIFA without affecting a data transfer between the PCI and the DDR2
memory controller. The switch fabrics also allow for seamless arbitration between the system masters
when accessing system slaves.
Two types of buses exist in the C6454 device: data buses and configuration buses. Some C6454
peripherals have both a data bus and a configuration bus interface, while others only have one type of
interface. Furthermore, the bus interface width and speed varies from peripheral to peripheral.
Configuration buses are mainly used to access the register space of a peripheral and the data buses are
used mainly for data transfers. However, in some cases, the configuration bus is also used to transfer
data. For example, data is transferred to the McBSP via its configuration bus. Similarly, the data bus can
also be used to access the register space of a peripheral. For example, the EMIFA and DDR2 memory
controller registers are accessed through their data bus interface.
The C64x+ Megamodule, the EDMA3 traffic controllers, and the various system peripherals can be
classified into two categories: masters and slaves. Masters are capable of initiating read and write
transfers in the system and do not rely on the EDMA3 for their data transfers. Slaves on the other hand
rely on the EDMA3 to perform transfers to and from them. Masters include the EDMA3 traffic controllers
and PCI. Slaves include the McBSP and I2C.
The C6454 device contains two switch fabrics through which masters and slaves communicate. The data
switch fabric, known as the data switched central resource (SCR), is a high-throughput interconnect
mainly used to move data across the system (for more information, see
Section 4.2
). The data SCR
connects masters to slaves via 128-bit data buses running at a SYSCLK2 frequency (SYSCLK2 is
generated from PLL1 controller). Peripherals that have a 128-bit data bus interface running at this speed
can connect directly to the data SCR; other peripherals require a bridge.
The configuration switch fabric, also known as the configuration switch central resource (SCR) is mainly
used by the C64x+ Megamodule to access peripheral registers (for more information, see
Section 4.3
).
The configuration SCR connects C64x+ Megamodule to slaves via 32-bit configuration buses running at a
SYSCLK2 frequency (SYSCLK2 is generated from PLL1 controller). As with the data SCR, some
peripherals require the use of a bridge to interface to the configuration SCR. Note that the data SCR also
connects to the configuration SCR.
Bridges perform a variety of functions:
Conversion between configuration bus and data bus.
Width conversion between peripheral bus width and SCR bus width.
Frequency conversion between peripheral bus frequency and SCR bus frequency.
For example, the EMIFA and DDR2 memory controller require a bridge to convert their 64-bit data bus
interface into a 128-bit interface so that they can connect to the data SCR.
Note that some peripherals can be accessed through the data SCR and also through the configuration
SCR.
Submit Documentation Feedback
System Interconnect
71
相关PDF资料 |
PDF描述 |
|---|---|
| TMS320C6454ZTZ7 | Fixed-Point Digital Signal Processor |
| TMS320C6454ZTZ8 | Fixed-Point Digital Signal Processor |
| TMX320C6454GTZ | Fixed-Point Digital Signal Processor |
| TMX320C6454GTZ7 | Fixed-Point Digital Signal Processor |
| TMX320C6454GTZ8 | Fixed-Point Digital Signal Processor |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TMS320C6454ZTZ7 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Fixed-Point Digital Signal Processor |
| TMS320C6454ZTZ8 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Fixed-Point Digital Signal Processor |
| TMS320C6455 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Fixed-Point Digital Signal Processor |
| TMS320C6455_07 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Fixed-Point Digital Signal Processor |
| TMS320C6455BCTZ | 功能描述:数字信号处理器和控制器 - DSP, DSC Fixed-Point Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
发布紧急采购，3分钟左右您将得到回复。