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参数资料
| 型号： | W19B320BBBH |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | FLASH 3V PROM, PDSO48 |
| 封装： | TSOP-48 |
| 文件页数： | 22/51页 |
| 文件大小： | 649K |
| 代理商： | W19B320BBBH |
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W19B320BT/B DATASHEET
Publication Release Date:Dec, 22, 2008
- 29 -
Revisionv A5
3. Except for the read cycle and the fourth cycle of the AUTOSELECT command sequence, all bus cycles are write cycles.
4. Data bits DQ15-DQ8 are don’t care in command sequences, except for RD and PD.
5. Unless otherwise noted, address bits A20-A11 are “don’t care”.
6. No unlock or command cycles required when bank is reading array data.
7. The Reset command is required to return to the read mode when the device is in the AUTOSELECT mode, or if DQ5
goes high (while the device is providing status information).
8. The fourth cycle of the AUTOSELECT command sequence is a read cycle. Data bits DQ15-DQ8 are don’t care. See the
AUTOSELECT Command Sequence section for more information.
9. The data is 82h for factory locked and 02h for not factory locked.
10. The data is 00h for an unprotected sector/sector block and 01h for a protected sector/sector block.
11. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
12. The Unlock Bypass Reset command is required to return to the read mode when the bank is in the unlock bypass mode.
13. Command is valid when device is ready to read array data or when device is in AUTOSELECT mode.
14. See Autoselect Codes table for device ID information
7.5.5 Write Operation Status
Status
DQ7
(Note 2)
DQ6
DQ5
(Note1)
DQ3
DQ2
(Note 2)
RY/#BY
Embedded Program
Algorithm
#DQ7
Toggle
0
N/A
No toggle
0
Standard
Mode
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
0
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing
limits. Refer to DQ5 description section for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded
Algorithm is in progress. The device outputs array data if the system addresses a non-busy bank.
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PDF描述 |
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| W19B320STT9F | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| W19L320STT9L | 2M X 16 FLASH 3.3V PROM, 90 ns, PDSO48 |
| W19B324MBT9G | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W19B320BB-H | 制造商:WINBOND 制造商全称:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations |
| W19B320BB-M | 制造商:WINBOND 制造商全称:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations |
| W19B320BT | 制造商:WINBOND 制造商全称:Winbond 功能描述:32Mbit, 2.7~3.6-volt single bank CMOS flash memory |
| W19B320BT-H | 制造商:WINBOND 制造商全称:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations |
| W19B320BT-M | 制造商:WINBOND 制造商全称:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations |
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