- 您现在的位置：买卖IC网 > PDF目录276877 > WEDPN4M72V-100B2M (WHITE ELECTRONIC DESIGNS CORP) 4M X 72 SYNCHRONOUS DRAM, 7 ns, PBGA219 PDF资料下载
参数资料
| 型号： | WEDPN4M72V-100B2M |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | DRAM |
| 英文描述： | 4M X 72 SYNCHRONOUS DRAM, 7 ns, PBGA219 |
| 封装： | 21 X 21 MM, PLASTIC, BGA-219 |
| 文件页数： | 15/15页 |
| 文件大小： | 403K |
| 代理商： | WEDPN4M72V-100B2M |
9
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WEDPN4M72V-XB2X
January 2005
Rev. 2
White Electronic Designs Corp. reserves the right to change products or specications without notice.
refresh requirement and ensure that each row is refreshed.
Alternatively, 4,096 AUTO REFRESH commands can be
issued in a burst at the minimum cycle rate (tRC), once
every refresh period (tREF).
SELF REFRESH*
The SELF REFRESH command can be used to retain data
in the SDRAM, even if the rest of the system is powered
down. When in the self refresh mode, the SDRAM retains
data without external clocking. The SELF REFRESH
command is initiated like an AUTO REFRESH command
except CKE is disabled (LOW). Once the SELF REFRESH
command is registered, all the inputs to the SDRAM
become “Don’t Care,” with the exception of CKE, which
must remain LOW.
Once self refresh mode is engaged, the SDRAM provides
its own internal clocking, causing it to perform its own
AUTO REFRESH cycles. The SDRAM must remain in
self refresh mode for a minimum period equal to tRAS and
may remain in self refresh mode for an indenite period
beyond that.
The procedure for exiting self refresh requires a sequence
of commands. First, CK must be stable (stable clock
is dened as a signal cycling within timing constraints
specified for the clock pin) prior to CKE going back
HIGH. Once CKE is HIGH, the SDRAM must have NOP
commands issued (a minimum of two clocks) for tXSR,
because time is required for the completion of any internal
refresh in progress.
Upon exiting the self refresh mode, AUTO REFRESH
commands must be issued as both SELF REFRESH and
AUTO REFRESH utilize the row refresh counter.
*Self refresh available in commercial and industrial temperatures only.
相关PDF资料 |
PDF描述 |
|---|---|
| WE32K32N-120G2UQ | EEPROM 5V MODULE, CQFP68 |
| W3EG264M72AFSR262D3SG | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| W3EG264M72AFSR265D3SG | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| WED3EG72M18S265JD3SG | 16M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| WS512K32-17G2I | 2M X 8 MULTI DEVICE SRAM MODULE, 17 ns, CQFP68 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| WEDPN4M72V-125B2C | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:4Mx72 Synchronous DRAM |
| WEDPN4M72V-125B2I | 制造商:Microsemi Corporation 功能描述:4M X 72 SDRAM MODULE, 3.3V, 121 MHZ, 219 PBGA 21MM X 21MM, I - Bulk |
| WEDPN4M72V-125B2M | 制造商:Microsemi Corporation 功能描述:4M X 72 SDRAM MODULE, 3.3V, 121 MHZ, 219 PBGA 21MM X 21MM, M - Bulk |
| WEDPN4M72V-133B2C | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:4Mx72 Synchronous DRAM |
| WEDPN4M72V-133B2I | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:4Mx72 Synchronous DRAM |
发布紧急采购，3分钟左右您将得到回复。