- 您现在的位置：买卖IC网 > PDF目录376449 > X98021L128-3.3-Z (INTERSIL CORP) 210MHz Triple Video Digitizer with Digital PLL PDF资料下载
参数资料
| 型号： | X98021L128-3.3-Z |
| 厂商： | INTERSIL CORP |
| 元件分类： | 消费家电 |
| 英文描述： | 210MHz Triple Video Digitizer with Digital PLL |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封装： | 14 X 20 MM, ROHS COMPLIANT, MS-022, MQFP-128 |
| 文件页数： | 16/29页 |
| 文件大小： | 294K |
| 代理商： | X98021L128-3.3-Z |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页
16
FN8219.0
June 2, 2005
Offset can drift significantly over 50°C, reducing image
quality and requiring that the user do a manual calibration
once the monitor has warmed up.
In addition to drift, many AFEs exhibit interaction between
the offset and gain controls. When the gain is changed, the
magnitude of the offset is changed as well. This again
increases the complexity of the firmware as it tries to
optimize gain and offset settings for a given video input
signal. Instead of adjusting just the offset, then the gain, both
have to be adjusted interactively until the desired ADC
output is reached.
The X98021 simplifies offset and gain adjustment and
completely eliminates offset drift using its Automatic Black
Level Compensation (ABLC) function. ABLC monitors
the black level and continuously adjusts the X98021's 10 bit
offset DACs to null out the offset. Any offset, whether due to
the video source or the X98021's analog amplifiers, is
eliminated with 10 bit (1/4 of an 8 bit ADC LSB) accuracy.
Any drift is compensated for well before it can have a visible
effect. Manual offset adjustment control is still available - an
8 bit register allows the firmware to adjust the offset ±64
codes in exactly 1 ADC LSB increments. And gain is now
completely independent of offset - adjusting the gain no
longer affects the offset, so there is no longer a need to
program the firmware to cope with interactive offset and gain
controls.
Finally, there should be no concerns over ABLC itself
introducing visible artifacts; it doesn't. ABLC operates at a
very low frequency, changing the offset in 1/4 LSB
increments, so it doesn't cause visible brightness
fluctuations. And once ABLC is locked, if the offset doesn't
drift, the DACs won't change. If desired, ABLC can be
disabled, allowing the firmware to work in the traditional way,
with 10 bit offset DACs under the firmware's control.
Gain and Offset Control
To simplify image optimization algorithms, the X98021
features fully-independent gain and offset adjustment.
Changing the gain does not affect the DC offset, and the
weight of an Offset DAC LSB does not vary depending on
the gain setting.
The full-scale gain is set in the three 8-bit registers (0x06-
0x08). The X98021 can accept input signals with amplitudes
ranging from 0.35V
P-P
to 1.4V
P-P
.
The offset controls shift the entire RGB input range,
changing the input image brightness. Three separate
registers provide independent control of the R, G, and B
channels. Their nominal setting is 0x80, which forces the
ADC to output code 0x00 (or 0x80 for U and V channels in
YUV mode) during the back porch period when ABLC is
enabled.
Functional Description
Inputs
The X98021 digitizes analog video inputs in both RGB and
Component (YPbPr) formats, with or without embedded sync
(SOG).
RGB Inputs
For RGB inputs, the black/blank levels are identical and
equal to 0V. The range for each color is typically 0V to 0.7V
from black to white. HSYNC and VSYNC are separate
signals.
Component YUV Inputs
In addition to RGB and RGB with SOG, the X98021 has an
option that is compatible with the component YPbPr and
YCbCr video inputs typically generated by DVD players.
While the X98021 digitizes signals in these color spaces, it
does not perform color space conversion; if it digitizes an
RGB signal, it outputs digital RGB, while if it digitizes a
YPbPr signal, it outputs digital YPbPr. For simplicity’s sake
we will call these non-RGB signals YUV.
The Luminance (Y) signal is applied to the Green Channel
and is processed in a manner identical to the Green input
with SOG described previously. The color difference signals
U and V are bipolar and swing both above and below the
black level. When the YUV mode is enabled, the black level
output for the color difference channels shifts to a mid scale
value of 0x80. Setting configuration register 0x05[2] = 1
enables the YUV signal processing mode of operation.
The X98021 can optionally decimate the incoming data to
provide a 4:2:2 output stream (configuration register
0x18[4] = 1) as shown in Table 2.
TABLE 1. YUV MAPPING (4:4:4)
INPUT
SIGNAL
X98021
INPUT
CHANNEL
X98021
OUTPUT
ASSIGNMENT
OUTPUT
SIGNAL
Y
Green
Green
Y
0
Y
1
Y
2
Y
3
U
Blue
Blue
U
0
U
1
U
2
U
3
V
Red
Red
V
0
V
1
V
2
V
3
TABLE 2. YUV MAPPING (4:2:2)
INPUT
SIGNAL
X98021
INPUT
CHANNEL
X98021
OUTPUT
ASSIGNMENT
OUTPUT
SIGNAL
Y
Green
Green
Y
0
Y
1
Y
2
Y
3
U
Blue
Blue
driven low
V
Red
Red
U
0
V
1
U
2
V
3
X98021
相关PDF资料 |
PDF描述 |
|---|---|
| X98024 | 240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3 | 240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3-Z | 240MHz Triple Video Digitizer with Digital PLL |
| XC145481 | 3 V PCM Codec-Filter |
| XC145481DW | 3 V PCM Codec-Filter |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X98024 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
| X98024_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3-Z | 功能描述:IC TRPL VID DIGITIZER 128MQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 标准包装:250 系列:- 类型:电平移位器 应用:LCD 电视机/监控器 安装类型:表面贴装 封装/外壳:28-WFQFN 裸露焊盘 供应商设备封装:28-WQFN（4x4）裸露焊盘 包装:带卷 (TR) 其它名称:296-32523-2TPS65198RUYT-ND |
| X98027 | 制造商:XICOR 制造商全称:Xicor Inc. 功能描述:PRELIMINARY INFORMATION |
发布紧急采购，3分钟左右您将得到回复。