参数资料
| 型号： | NCV303LSN29T1G |
| 厂商： | ON Semiconductor |
| 文件页数： | 20/26页 |
| 文件大小： | 0K |
| 描述： | IC VOLT DETECTOR 2.9V 5TSOP |
| 标准包装： | 1 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 可调节/可选择 |
| 电压 - 阀值： | 2.9V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-TSOP（0.059"，1.50mm 宽）5 引线 |
| 供应商设备封装： | 5-TSOP |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCV303LSN29T1GOSCT |
NCP302, NCP303
V DD
EN
2
Input
IN
Logic 1
C D
5
C D
NCP302L
Series
1
Reset Output
To MCU or
Logic Circuitry
V DD
3
GND
NCP302
Input Pin
Logic 1
Enable
Pin
C D Pin
V DET
0V
1
0
V DD
V TCD
0V
Reset
Output
0V
Note: Logic 1 is in tristate when EN = 0,
V TCD 0.675 * V DD
t D2
t D2
Figure 45. Undervoltage Detection with Independent Reset Signal Control
This circuit monitors V DD for undervoltage. If the V DD
input falls below the detector threshold (V DET ? ), then the
capacitor on the C D pin will be immediately discharged
resulting in the reset output changing to its active state
indicating that an undervoltage event has been detected. The
addition of a logic gate (Logic 1) provides for reset output
logic gate is tristated the undervoltage detector will behave
normally. If the tristate is de ? asserted, the logic gate will pull
the C D pin low resulting in the Reset Output pin changing to
an active state. This independent control is useful in power
supply sequencing applications when the Reset Output is
tied to the enable input of an LDO or DC ? DC converter.
control which is independent of V DD . If the output of the
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