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参数资料
| 型号： | 1023YE-42TE13 |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封装： | TSSOP-8 |
| 文件页数： | 1/17页 |
| 文件大小： | 107K |
| 代理商： | 1023YE-42TE13 |
DESCRIPTION
The CAT1021, CAT1022 and CAT1023 are complete
memory and supervisory solutions for microcontroller-
based systems. A 2kbit serial EEPROM memory and a
system power supervisor with brown-out protection are
integrated together in low power CMOS technology.
Memory interface is via a 400kHz I2C bus.
The CAT1021 and CAT1023 provide a precision VCC
sense circuit and two open drain outputs: one (RESET)
drives high and the other (
RESET) drives low whenever
VCC falls below the reset threshold voltage. The CAT1021
also has a Write Protect input (WP). Write operations
are disabled if WP is connected to a logic high.
The CAT1022 has a
RESET output and does not have
a Write Protect input.
All supervisors have a 1.6 second watchdog timer circuit
that resets a system to a known state if software or a
hardware glitch halts or “hangs” the system. For the
CAT1021 and CAT1022, the watchdog timer monitors
the SDA signal. The CAT1023 has a separate watchdog
timer interrupt input pin, WDI.
CAT1021, CAT1022, CAT1023
Supervisory Circuits with I2C Serial 2K CMOS EEPROM, Manual Reset
and Watchdog Timer
FEATURES
s Precision power supply voltage monitor
— 5V, 3.3V and 3V systems
— Five threshold voltage options
s Watchdog timer
s Active high or low reset
— Valid reset guaranteed at V
CC=1V
s 400kHz I2C bus
s 2.7V to 5.5V operation
s Low power CMOS technology
s 16-Byte page write buffer
s Built-in inadvertent write protection
— WP pin (CAT1021)
s 1,000,000 Program/Erase cycles
s Manual reset input
s 100 year data retention
s 8-pin DIP, SOIC, TSSOP, TDFN (MSOP
(3x4.9mm) & 3x3mm foot prints) or MSOP
packages
— TDFN max height is 0.8mm
s Automotive, extended automotive and
industrial temperature ranges
2003 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc No. 3009, Rev. E
The power supply monitor and reset circuit protect memory
and system controllers during power up/down and against
brownout conditions. Five reset threshold voltages support
5V, 3.3V and 3V systems. If power supply voltages are out
of tolerance reset signals become active, preventing the
system microcontroller, ASIC or peripherals from operating.
Reset signals become inactive typically 200 ms after the
supply voltage exceeds the reset threshold level. With both
active high and low reset signals, interface to microcontrollers
and other ICs is simple. In addition, the
RESET pin or a
separate input,
MR, can be used as an input for push-button
manual reset capability.
The on-chip, 2k EEPROM memory features a 16-byte page.
In addition, hardware data protection is provided by a VCC
sense circuit that prevents writes to memory whenever VCC
falls below the reset threshold or until VCC reaches the reset
threshold during power up.
Available packages include an 8-pin DIP and surface mount
8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP
packages. The TDFN package thickness is 0.8mm maximum.
TDFN footprint options are 3x3mm or 3x4.9mm (MSOP pad
layout).
Preliminary Information
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