参数资料
型号: 23K640-I/SN
厂商: Microchip Technology
文件页数: 11/28页
文件大小: 0K
描述: IC SRAM 64KBIT 20MHZ 8SOIC
产品培训模块: 23x640 and 23x256 SRAM Overview
标准包装: 100
格式 - 存储器: RAM
存储器类型: SRAM
存储容量: 64K (8K x 8)
速度: 20MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
产品目录页面: 1442 (CN2011-ZH PDF)
23A640/23K640
2.5
Read Status Register Instruction
( RDSR )
The mode bits indicate the operating mode of the
SRAM. The possible modes of operation are:
The Read Status Register instruction ( RDSR ) provides
access to the STATUS register. The STATUS register
may be read at any time. The STATUS register is
formatted as follows:
0 0 = Byte mode (default operation)
1 0 = Page mode
0 1 = Sequential mode
1 1 = Reserved
TABLE 2-2:
7 6
W/R W/R
STATUS REGISTER
5 4 3 2 1
– – – – –
0
W/R
Write and read commands are shown in Figure 2-7 and
Figure 2-8 .
The HOLD bit enables the Hold pin functionality. It must
be set to a ‘0’ before HOLD pin is brought low for HOLD
MODE MODE
0
0
0
0
1
HOLD
function to work properly. Setting HOLD to ‘ 1 ’ disables
W/R = writable/readable.
feature.
Bits 2 through 5 are reserved and should always be set
to ‘ 0 ’. Bit 1 will read back as ‘ 1 ’ but should always be
written as ‘ 0 ’.
See Figure 2-7 for the RDSR timing sequence.
FIGURE 2-7:
CS
READ STATUS REGISTER TIMING SEQUENCE ( RDSR )
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
SI
0
0
0
0
0
1
0
1
SO
High-Impedance
7
Data from STATUS Register
6 5 4 3 2
1
0
? 2008-2011 Microchip Technology Inc.
DS22126E-page 11
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