参数资料
型号: 24AA32AF-I/P
厂商: Microchip Technology
文件页数: 5/30页
文件大小: 0K
描述: IC SRL EEPROM 4KX8 1.8V 8-PDIP
标准包装: 60
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 32K (4K x 8)
速度: 100kHz,400kHz
接口: I²C,2 线串口
电源电压: 1.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
产品目录页面: 1446 (CN2011-ZH PDF)
24AA32AF/24LC32AF
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Name
A0
A1
A2
V SS
SDA
SCL
WP
V CC
PDIP
1
2
3
4
5
6
7
8
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
SOT-23
2
3
1
5
4
Description
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
2.1
A0, A1, A2 Chip Address Inputs
2.3
Serial Clock (SCL)
The A0, A1 and A2 inputs are used by the 24XX32AF
for multiple device operation. The levels on these
inputs are compared with the corresponding bits in the
The SCL input is used to synchronize the data transfer
to and from the device.
slave address. The chip is selected if the comparison is
true.
2.4
Write-Protect (WP)
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V CC or V SS .
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘ 0 ’ or logic ‘ 1 ’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘ 0 ’ or logic ‘ 1 ’
before normal device operation can proceed. Address
pins are not available in the SOT-23 package.
This pin must be connected to either V SS or V CC . If tied
to V SS , write operations are enabled. If tied to V CC ,
write operations are inhibited for the upper 1/4 of the
array (C00h-FFFh), but read operations are not
affected.
2.2
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open-drain
terminal, therefore, the SDA bus requires a pull-up
resistor to V CC (typical 10 k Ω for 100 kHz, 2 k Ω for
400 kHz)
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
? 2009 Microchip Technology Inc.
DS22184A-page 5
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