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| 型号： | 24AA515T-I/SM |
| 厂商： | Microchip Technology |
| 文件页数： | 5/24页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 512KBIT 400KHZ 8SOIC |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 2,100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 512K (64K x 8) |
| 速度： | 100kHz，400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SOIJ |
| 包装： | 带卷 (TR) |
| 其它名称： | 24AA515TI/SM |
24AA515/24LC515/24FC515
2.0
PIN DESCRIPTIONS
2.4
Serial Clock (SCL)
The descriptions of the pins are listed in Table 2-1.
This input is used to synchronize the data transfer from
and to the device.
TABLE 2-1:
PIN FUNCTION TABLE
Name PDIP SOIJ
Function
2.5
Write-Protect (WP)
A0
A1
A2
1
2
3
1
2
3
User Configurable Chip Select
User Configurable Chip Select
Non-Configurable Chip Select.
This pin must be connected to either V SS or V CC . If tied
to V SS , write operations are enabled. If tied to V CC ,
write operations are inhibited but read operations are
not affected.
This pin must be hard wired to
logical 1 state (V CC ). Device
will not operate with this pin
3.0
FUNCTIONAL DESCRIPTION
left floating or held to logical 0
(V SS ).
The 24XX515 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
V SS
SDA
SCL
WP
V CC
4
5
6
7
8
4
5
6
7
8
Ground
Serial Data
Serial Clock
Write-Protect Input
+1.7 to 5.5V (24AA515)
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus must be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access, and
generates the Start and Stop conditions while the
24XX515 works as a slave. Both master and slave can
+2.5 to 5.5V (24LC515)
+2.5 to 5.5V (24FC515)
operate as a transmitter or receiver, but the master
device determines which mode is activated.
2.1
A0, A1 Chip Address Inputs
The A0, A1 inputs are used by the 24XX515 for multiple
device operations. The levels on these inputs are
compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
Up to four devices may be connected to the same bus
by using different Chip Select bit combinations. In most
applications, the chip address inputs A0 and A1 are
hard-wired to logic ‘ 0 ’ or logic ‘ 1 ’. For applications in
which these pins are controlled by a microcontroller or
other programmable device, the chip address pins
must be driven to logic ‘ 0 ’ or logic ‘ 1 ’ before normal
device operation can proceed.
2.2
A2 Chip Address Input
The A2 input is non-configurable Chip Select. This pin
must be tied to V CC in order for this device to operate.
2.3
Serial Data (SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V CC (typical 10 k Ω for 100 kHz, 2 k Ω for
400 kHz and 1 MHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
? 2008 Microchip Technology Inc.
DS21673G-page 5
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| 24AA52-I/MC | 功能描述:电可擦除可编程只读存储器 256x8 - 2.5V Industrial Temp RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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| 24AA52-I/P | 功能描述:电可擦除可编程只读存储器 256x8 - 1.8V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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