参数资料
| 型号： | 24C00T-I/MNY |
| 厂商： | Microchip Technology |
| 文件页数： | 5/34页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM SER 128BIT 5V 8TDFN |
| 标准包装： | 3,300 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 128（16 x 8） |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-TDFN（2x3） |
| 包装： | 带卷 (TR) |
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24AA00/24LC00/24C00
3.0
FUNCTIONAL DESCRIPTION
4.0
BUS CHARACTERISTICS
The 24XX00 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus has to be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access, and
generates the Start and Stop conditions, while the
24XX00 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
The following bus protocol has been defined:
? Data transfer may be initiated only when the bus
is not busy.
? During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1
Bus Not Busy (A)
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited.
? 1996-2011 Microchip Technology Inc.
DS21178H-page 5
相关PDF资料 |
PDF描述 |
|---|---|
| 24AA00T-I/MNY | IC EEPROM SER 128BIT 1.8V 8TDFN |
| 11LC161T-I/TT | IC EEPROM 16K SER IND SOT23-3 |
| 11AA161T-I/TT | IC EEPROM 16K SER IND SOT23-3 |
| 11LC020T-E/TT | IC EEPROM 2K FLASH SOT-23-3 |
| 11LC010-E/SN | IC EEPROM 1K FLASH 2.5V 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24C00T-IOT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:128 Bit I 2 C? Bus Serial EEPROM |
| 24C00T-IP | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:128 Bit I 2 C? Bus Serial EEPROM |
| 24C00T-ISN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:128 Bit I 2 C? Bus Serial EEPROM |
| 24C00T-IST | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:128 Bit I 2 C? Bus Serial EEPROM |
| 24C00T-OT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:128 Bit I 2 C? Bus Serial EEPROM |
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