参数资料
| 型号： | 24FC64T-I/ST |
| 厂商： | Microchip Technology |
| 文件页数： | 7/44页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 64KBIT 1MHZ 8TSSOP |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 64K (8K x 8) |
| 速度： | 400kHz，1MHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 带卷 (TR) |
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24AA64/24LC64/24FC64
5.0 DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX64 will select a read or
write operation.
The control byte consists of a four-bit control code. For
the 24XX64, this is set as ‘ 1010 ’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
FIGURE 5-1:
CONTROL BYTE FORMAT
Read/Write Bit
bits allow the use of up to eight 24XX64 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
Control Code
Chip Select
Bits
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
S
1
0
1
0
A2
A1
A0 R/W ACK
are, in effect, the three Most Significant bits of the word
address.
Slave Address
For the SOT-23 and Chip Scale packages, the address
pins are not available. During device addressing, the
A2, A1 and A0 Chip Select bits (Figure 5-2) should be
set to ‘ 0 ’.
Start Bit
5.1
Acknowledge Bit
Contiguous Addressing Across
The last bit of the control byte defines the operation to
be performed. When set to a ‘ 1 ’, a read operation is
selected. When set to a ‘ 0 ’, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A12...A0 are used, the upper-three address bits
are “don’t care” bits. The upper-address bits are
transferred first, followed by the Less Significant bits.
Following the Start condition, the 24XX64 monitors the
SDA bus, checking the device-type identifier being
transmitted. Upon receiving a ‘ 1010 ’ code and appro-
priate device-select bits, the slave device outputs an
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 512K
bits by adding up to eight 24XX64 devices on the same
bus. In this case, software can use A0 of the control
byte as address bit A13; A1 as address bit A14; and A2
as address bit A15. It is not possible to sequentially
read across device boundaries.
The SOT-23 and Chip Scale packages do not support
multiple device addressing on the same bus.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
Control Byte
Address High Byte
Address Low Byte
0 R/W
1
0
1
0
A
2
A
1
A
x
x
x
A A A
12 11 10
A
9
A
8
A
7
?
?
?
?
?
?
A
0
Control
Code
Chip
Select
bits
x = “don’t care” bit
? 1997-2012 Microchip Technology Inc.
DS21189S-page 7
相关PDF资料 |
PDF描述 |
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| 24FC64T-I/MS | IC EEPROM 64KBIT 1MHZ 8MSOP |
| XC6SLX16-N3FTG256I | IC FPGA SPARTAN-6 256FBGA |
| 24FC64-I/ST | IC EEPROM 64KBIT 1MHZ 8TSSOP |
| 24FC64-I/MS | IC EEPROM 64KBIT 1MHZ 8MSOP |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 24FC65 | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:64K 5.0V 1 MHz I 2 C Smart Serial EEPROM |
| 24FC65/P | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 24FC65-/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:64K 5.0V 1 MHz I2C⑩ Smart Serial⑩ EEPROM |
| 24FC65/SM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 24FC65-/SM | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:64K 5.0V 1 MHz I2C⑩ Smart Serial⑩ EEPROM |
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