- 您现在的位置：买卖IC网 > PDF目录4296 > 24LC024HT-E/MS (Microchip Technology)IC EEPROM 2KBIT 400KHZ 8MSOP PDF资料下载
参数资料
| 型号： | 24LC024HT-E/MS |
| 厂商： | Microchip Technology |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 2KBIT 400KHZ 8MSOP |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K (256 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
24AA024H/24LC024H
4.0
BUS CHARACTERISTICS
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
The following bus protocol has been defined:
? Data transfer may be initiated only when the bus
is not busy.
? During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited, though only the last sixteen will
be stored when doing a write operation. When an
overwrite does occur, it will replace data in a first-in
first-out fashion.
4.1
Bus Not Busy (A)
4.5
Acknowledge
Both data and clock lines remain high.
Each receiving device, when addressed, is required to
generate an acknowledge after the reception of each
4.2
Start Data Transfer (B)
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
Note:
The 24AA024H/24LC024H does not gen-
erate any Acknowledge bits if an internal
programming cycle is in progress.
4.3
Stop Data Transfer (C)
The device that acknowledges has to pull down the
SDA line during the Acknowledge clock pulse in such a
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
way that the SDA line is stable low during the high
period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
4.4
Data Valid (D)
slave by not generating an Acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
the slave must leave the data line high to enable the
master to generate the Stop condition (Figure 4-2).
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS CHARACTERISTICS
SCL
(A)
(B)
(C)
(D)
(C)
(A)
SDA
Start
Condition
FIGURE 4-2:
Address or
Acknowledge
Valid
ACKNOWLEDGE TIMING
Data
Allowed
to Change
Stop
Condition
Acknowledge
Bit
SCL
1
2
3
4
5
6
7
8
9
1
2
3
SDA
Data from transmitter
Data from transmitter
Transmitter must release the SDA line at this point allowing
the Receiver to pull the SDA line low to acknowledge the
previous eight bits of data.
? 2008 Microchip Technology Inc.
Receiver must release the SDA line at this
point so the Transmitter can continue
sending data.
DS22102A-page 7
相关PDF资料 |
PDF描述 |
|---|---|
| 748610-2 | CONT, HD22 CS SCKT, 30AU |
| 24LC014T-E/MS | IC EEPROM 1KBIT 400KHZ 8MSOP |
| XC2S30-5TQ144I | IC FPGA 2.5V I-TEMP 144-TQFP |
| XC6SLX4-L1CPG196C | IC FPGA SPARTAN 6 3K 196CPGBGA |
| 24LC014HT-E/MS | IC EEPROM 1KBIT 400KHZ 8MSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24LC024HT-I/MC | 功能描述:电可擦除可编程只读存储器 2K 256 X 8 SERIAL EE IND 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC024HT-I/MNY | 功能描述:电可擦除可编程只读存储器 2K 256 X 8 SERIAL EE IND 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC024HT-I/MS | 功能描述:电可擦除可编程只读存储器 2K 256 X 8 SERIAL EE IND 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC024HT-I/SN | 功能描述:电可擦除可编程只读存储器 2K 256 X 8 SERIAL EE IND 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC024HT-I/ST | 功能描述:电可擦除可编程只读存储器 2K 256 X 8 SERIAL EE IND 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
发布紧急采购，3分钟左右您将得到回复。