参数资料
型号: 24LC025T-E/SN
厂商: Microchip Technology
文件页数: 7/30页
文件大小: 0K
描述: IC EEPROM 2KBIT 400KHZ 8SOIC
标准包装: 3,300
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 2K (256 x 8)
速度: 400kHz
接口: I²C,2 线串口
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
24AA024/24LC024/24AA025/24LC025
5.0
DEVICE ADDRESSING
FIGURE 5-1:
CONTROL BYTE FORMAT
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
Read/Write Bit
The control byte consists of a four-bit control code. For
the 24AA024/24LC024/24AA025/24LC025, this is set
as ‘ 1010 ’ binary for read and write operations. The next
Control Code
Chip Select
Bits
three bits of the control byte are the Chip Select bits
S
1
0
1
0
A2
A1
A0 R/ W ACK
(A2, A1, A0). The Chip Select bits allow the use of up
to eight 24AA024/24LC024/24AA025/24LC025
devices on the same bus and are used to select which
Slave Address
device is accessed. The Chip Select bits in the control
byte must correspond to the logic levels on the corre-
sponding A2, A1 and A0 pins for the device to respond.
These bits are in effect the three Most Significant bits of
Start Bit
5.1
Acknowledge Bit
Contiguous Addressing Across
the word address.
For the SOT-23 package, the A2 address pin is not
available. During device addressing, the A2 Chip
Select bit should be set to ‘ 0 ’.
The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. Following the Start condition, the 24AA024/
24LC024/24AA025/24LC025 monitors the SDA bus
checking the control byte being transmitted. Upon
receiving a ‘ 1010 ’ code and appropriate Chip Select
bits, the slave device outputs an Acknowledge signal
on the SDA line. Depending on the state of the R/W bit,
the 24AA024/24LC024/24AA025/24LC025 will select a
read or write operation.
? 2009 Microchip Technology Inc.
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 16K bits
by adding up to eight 24AA024/24LC024/24AA025/
24LC025 devices on the same bus. In this case, soft-
ware can use A0 of the control byte as address bit A8,
A1 as address bit A9 and A2 as address bit A10. It is
not possible to sequentially read across device
boundaries.
For the SOT-23 package, up to four 24AA025/24LC025
devices can be added for up to 8K bits of address
space. In this case, software can use A0 of the control
byte as address bit A8, and A1 as address bit A9. It is
not possible to sequentially read across device bound-
aries.
DS21210N-page 7
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