参数资料
| 型号： | 24LC21/SN |
| 厂商： | Microchip Technology |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1KBIT 400KHZ 8SOIC |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K (128 x 8) |
| 速度： | 100kHz，400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 管件 |
| 产品目录页面： | 1448 (CN2011-ZH PDF) |
24LC21
3.1.4
DATA VALID (D)
3.1.5
ACKNOWLEDGE
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
period of the clock signal. There is one clock pulse per
Note:
The 24LC21 does not generate any
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited, although only the last eight will
be stored when doing a write operation. When an
overwrite does occur, it will replace data in a first in first
out fashion.
Acknowledge bits if an internal program-
ming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an Acknowledge bit on the last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line high to enable
the master to generate the Stop condition.
FIGURE 3-3:
BUS TIMING START/STOP
V HYS
SCL
T SU : STA
SDA
FIGURE 3-4:
T HD : STA
Start
BUS TIMING DATA
T F
T LOW
T HIGH
T SU : STO
T R
Stop
SCL
T SU : STA
T HD : DAT
T SU : DAT
T SU : STO
T HD : STA
SDA
IN
T SP
T AA
T HD : STA
T AA
T BUF
SDA
OUT
DS21095J-page 6
? 2004 Microchip Technology Inc.
相关PDF资料 |
PDF描述 |
|---|---|
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| 24AA32A-I/ST | IC EEPROM 32KBIT 400KHZ 8TSSOP |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 24LC21T/SN | 功能描述:电可擦除可编程只读存储器 2.5V Dual Mode RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC21T-I/SN | 功能描述:电可擦除可编程只读存储器 2.5V Dual Mode RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC22A-I/P | 功能描述:电可擦除可编程只读存储器 VESA E-EDID RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC22A-I/PG | 功能描述:电可擦除可编程只读存储器 VESA E-EDID Lead Free Package RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC22A-I/SN | 功能描述:电可擦除可编程只读存储器 VESA E-EDID RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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