- 您现在的位置：买卖IC网 > PDF目录298280 > 24LC256-IT/MS 32K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 PDF资料下载
参数资料
| 型号： | 24LC256-IT/MS |
| 元件分类： | PROM |
| 英文描述： | 32K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封装： | ROHS COMPLIANT, PLASTIC, MSOP-8 |
| 文件页数： | 8/42页 |
| 文件大小： | 797K |
| 代理商： | 24LC256-IT/MS |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页
24AAXX/24LCXX/24FCXX
DS21930C-page 16
2007 Microchip Technology Inc.
6.0
WRITE OPERATIONS
6.1
Byte Write
A byte write operation begins with a Start condition
from the master followed by the four-bit control code
(see Figure 6-1 and Figure 6-2). The next 3 bits are
either the Block Address bits (for devices without
address pins) or the Chip Select bits (for devices with
address pins). Then the master transmitter clocks the
R/W bit (which is a logic low) onto the bus. The slave
then generates an Acknowledge bit during the ninth
clock cycle.
The next byte transmitted by the master is the address
byte (for 128-bit to 16 Kbit devices) or the high-order
address byte (for 32-1024 Kbit devices). For 32 through
1024 Kbit devices, the high-order address byte is
followed by the low-order address byte. In either case,
each address byte is acknowledged by the 24XX and
the address bits are latched into the internal address
counter of the 24XX.
For the 24XX00 devices, only the lower four address
bits are used by the device. The upper four bits are
“don’t cares.”
After receiving the ACK from the 24XX acknowledging
the final address byte, the master device transmits the
data word to be written into the addressed memory
location. The 24XX acknowledges again and the
master generates a Stop condition, which initiates the
internal write cycle.
If an attempt is made to write to an array with the WP
pin held high, the device will acknowledge the
command, but no write cycle will occur, no data will be
written, and the device will immediately accept a new
command. After a byte Write command, the internal
address counter will increment to the next address
location. During a write cycle, the 24XX will not
acknowledge commands.
FIGURE 6-1:
BYTE WRITE: 128-BIT TO 16 KBIT DEVICES
FIGURE 6-2:
BYTE WRITE: 32 TO 1024 KBIT DEVICES
S
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte
Address
Byte
Data
A
C
K
A
C
K
A
C
K
Byte
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
Control
Byte
High Order
Address Byte
Low Order
Address Byte
Data
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
S
P
Byte
相关PDF资料 |
PDF描述 |
|---|---|
| 24LC32AIP | I2C Serial EEPROM |
| 24LC32AISM | I2C Serial EEPROM |
| 24LCS21IP | I2C Serial EEPROM |
| 24LCS21ISN | High-Speed/Low-Power Microcontrollers |
| 24LCS21P | I2C Serial EEPROM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24LC256SC/S15K | 制造商:Microchip Technology Inc 功能描述:256K I2C SMARTCARD EE DIE IN WAFFLE PK - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC256SC/W15K | 制造商:Microchip Technology Inc 功能描述:256K I2C SMARTCARD EE WAFER - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC256SC/WF15K | 制造商:Microchip Technology Inc 功能描述:256K I2C SMARTCARD EE WFR ON FR - Gel-pak, waffle pack, wafer, diced wafer on film |
| 24LC256T-E/MF | 功能描述:电可擦除可编程只读存储器 256K 32K X 8 2.5V SER EE EXT RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24LC256T-E/MNY | 功能描述:电可擦除可编程只读存储器 256K, 32Kx8, 2.5V SER EE, ExT RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
发布紧急采购，3分钟左右您将得到回复。