参数资料
型号: 24LC64T-E/OT
厂商: Microchip Technology
文件页数: 8/44页
文件大小: 0K
描述: IC EEPROM 64KBIT 400KHZ SOT23-5
标准包装: 3,000
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 400kHz
接口: I²C,2 线串口
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 带卷 (TR)
24AA64/24LC64/24FC64
6.0
WRITE OPERATIONS
6.2
Page Write
6.1
Byte Write
The write control byte, word address and the first data
byte are transmitted to the 24XX64 in the same way as
Following the Start condition from the master, the
control code (four bits), the Chip Select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow once it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the high-order byte of the word
address and will be written into the Address Pointer of
the 24XX64. The next byte is the Least Significant
Address Byte. After receiving another Acknowledge
signal from the 24XX64, the master device will transmit
the data word to be written into the addressed memory
location. The 24XX64 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle and, during this time, the 24XX64
in a byte write. However, instead of generating a Stop
condition, the master transmits up to 31 additional
bytes which are temporarily stored in the on-chip page
buffer and will be written into memory once the master
has transmitted a Stop condition. Upon receipt of each
word, the five lower Address Pointer bits are internally
incremented by one. If the master should transmit more
than 32 bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an inter-
nal write cycle will begin (Figure 6-2). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command, but no write
cycle will occur, no data will be written, and the device
will immediately accept a new command.
will not generate Acknowledge signals (Figure 6-1). If
an attempt is made to write to the array with the WP pin
held high, the device will acknowledge the command,
but no write cycle will occur, no data will be written and
the device will immediately accept a new command.
After a byte Write command, the internal address coun-
ter will point to the address location following the one
that was just written.
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Note:
When doing a write of less than 32 bytes
the data in the rest of the page is refreshed
along with the data bytes being written.
This will force the entire page to endure a
write cycle, for this reason endurance is
specified per page.
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
6.3
Write Protection
The WP pin allows the user to write-protect the entire
array (0000-1FFF) when the pin is tied to V CC . If tied to
V SS the write protection is disabled. The WP pin is
sampled at the Stop bit for every Write command
(Figure 4-1). Toggling the WP pin after the Stop bit will
have no effect on the execution of the write cycle.
DS21189S-page 8
? 1997-2012 Microchip Technology Inc.
相关PDF资料
PDF描述
24LC16B-E/MC IC EEPROM 16KBIT 400KHZ 8DFN
93LC76A-E/SN IC EEPROM 8KBIT 2MHZ 8SOIC
XC2S100-5FG256I IC FPGA 2.5V I-TEMP 256-FBGA
93LC76B-E/SN IC EEPROM 8KBIT 2MHZ 8SOIC
XC6SLX16-3CPG196I IC FPGA SPARTAN 6 14K 196CPGBGA
相关代理商/技术参数
参数描述
24LC64T-I/MC 功能描述:电可擦除可编程只读存储器 64K 8KX8 2.5V SER EE IND RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
24LC64T-I/MC-CUT TAPE 制造商:Microchip 功能描述:24LC64 Series 64 Kb I2C 2 Wire (8K X 8) 2.5 V Serial EEPROM SMT - DFN-8
24LC64T-I/MNY 功能描述:电可擦除可编程只读存储器 64K 8K X 8 1.8V SER EE IND RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
24LC64T-I/MS 功能描述:电可擦除可编程只读存储器 8kx8 - 2.5V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8
24LC64T-I/MSG 功能描述:电可擦除可编程只读存储器 8kx8 - 2.5V Lead Free Package RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8