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| 型号： | 24VL024H/ST |
| 元件分类： | PROM |
| 英文描述： | I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 封装： | 4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-8 |
| 文件页数： | 26/28页 |
| 文件大小： | 447K |
| 代理商： | 24VL024H/ST |
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2008 Microchip Technology Inc.
DS22109A-page 7
24VL024H
4.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1
Bus Not Busy (A)
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
4.4
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited, though only the last sixteen will
be stored when doing a write operation. When an
overwrite does occur, it will replace data in a first-in
first-out fashion.
4.5
Acknowledge
Each receiving device, when addressed, is required to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the Acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge-related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an Acknowledge bit on the last
byte that has been clocked out of the slave. In this case,
the slave must leave the data line high to enable the
master to generate the Stop condition (Figure 4-2).
FIGURE 4-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS CHARACTERISTICS
FIGURE 4-2:
ACKNOWLEDGE TIMING
Note:
The 24VL024H does not generate any
Acknowledge
bits
if
an
internal
programming cycle is in progress.
(A)
(B)
(C)
(D)
(A)
(C)
SCL
SDA
Start
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
Stop
Condition
SCL
9
8
7
6
5
4
3
2
1
123
The transmitter must release the SDA line at this point
allowing the receiver to pull the SDA line low to acknowl-
edge the previous eight bits of data.
The receiver must release the SDA line at
this point so the transmitter can continue
sending data.
SDA
Acknowledge
Bit
Data from transmitter
相关PDF资料 |
PDF描述 |
|---|---|
| 24VL024HT/MNY | I2C/2-WIRE SERIAL EEPROM, PDSO8 |
| 25.000.1956.0 | STRIP TERMINAL BLOCK |
| 25.001.1756.0 | STRIP TERMINAL BLOCK |
| 25.342.2053.0 | 15 A, MODULAR TERMINAL BLOCK, 1 ROW, 1 DECK |
| 25.501.4153.0 | 20 A, STRIP TERMINAL BLOCK, 1 ROW, 1 DECK |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24VL024HT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:2K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24VL024HT/MNY | 功能描述:电可擦除可编程只读存储器 2K 256X8 SERIAL EE 1.5V 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24VL024HT/MS | 功能描述:电可擦除可编程只读存储器 2K 256X8 SERIAL EE 1.5V 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 24VL024HT/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:2K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24VL024HT/SN | 功能描述:电可擦除可编程只读存储器 2K 256X8 SERIAL EE 1.5V 1/2 ARRAY WP RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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