参数资料
型号: 25AA080C-I/MS
厂商: Microchip Technology
文件页数: 11/28页
文件大小: 0K
描述: IC SRL EEPROM 1KX8 1.8V 8-MSOP
标准包装: 100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 8K (1K x 8)
速度: 3MHZ,5MHZ,10MHZ
接口: SPI 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-MSOP
包装: 管件
产品目录页面: 1448 (CN2011-ZH PDF)
25XX080C/D
2.6
Write Status Register ( WRSR )
See Figure 2-7 for the WRSR timing sequence.
Instruction
The Write Status Register ( WRSR ) instruction allows the
TABLE 2-3:
ARRAY PROTECTION
user to write to the nonvolatile bits in the STATUS reg-
ister as shown in Table 2-2. The user is able to select
one of four levels of protection for the array by writing
to the appropriate bits in the STATUS register. The
array is divided up into four segments. The user has the
ability to write-protect none, one, two or all four of the
segments of the array. The partitioning is controlled as
shown in Table 2-3.
The Write-Protect Enable (WPEN) bit is also a
nonvolatile bit that is available as an enable bit for the WP
BP1
0
0
1
1
BP0
0
1
0
1
Array Addresses
Write-Protected
none
upper 1/4
(0300h-03FFh)
upper 1/2
(0200h-03FFh)
all
(0000h-03FFh)
pin. The Write-Protect (WP) pin and the Write-Protect
Enable (WPEN) bit in the STATUS register control the
programmable hardware write-protect feature. Hardware
write protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes to
nonvolatile bits in the STATUS register are disabled. See
Table 2-4 for a matrix of functionality on the WPEN bit.
FIGURE 2-7:
CS
WRITE STATUS REGISTER TIMING SEQUENCE ( WRSR )
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
Data to STATUS Register
SI
0
0
0
0
0
0
0
1
7
6
5
4
3
2
1
0
High-Impedance
SO
? 2009 Microchip Technology Inc.
DS22151A-page 11
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