参数资料
| 型号： | 25AA320A-I/MS |
| 厂商： | Microchip Technology |
| 文件页数： | 10/30页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 32KBIT 10MHZ 8MSOP |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 32K (4K x 8) |
| 速度： | 10MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
| 产品目录页面： | 1449 (CN2011-ZH PDF) |
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25AA320A/25LC320A
2.5
Read Status Register Instruction
The Write Enable Latch (WEL) bit indicates the status
( RDSR )
The Read Status Register instruction ( RDSR ) provides
access to the STATUS register. The STATUS register
may be read at any time, even during a write cycle. The
STATUS register is formatted as follows:
of the write enable latch and is read-only. When set to
a ‘ 1 ’, the latch allows writes to the array, when set to a
‘ 0 ’, the latch prohibits writes to the array. The state of
this bit can always be updated via the WREN or WRDI
commands regardless of the state of write protection
on the STATUS register. These commands are shown
in Figure 2-4 and Figure 2-5.
TABLE 2-2:
STATUS REGISTER
The Block Protection (BP0 and BP1) bits indicate
7 6 5 4 3 2 1
W/R – – – W/R W/R R
WPEN X X X BP1 BP0 WEL
W/R = writable/readable. R = read-only.
0
R
WIP
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile, and are shown in Table 2-3.
See Figure 2-6 for the RDSR timing sequence.
The Write-In-Process (WIP) bit indicates whether the
25XX320A is busy with a write operation. When set to
a ‘ 1 ’, a write is in progress, when set to a ‘ 0 ’, no write
is in progress. This bit is read-only.
FIGURE 2-6:
CS
READ STATUS REGISTER TIMING SEQUENCE ( RDSR )
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
SI
0
0
0
0
0
1
0
1
High-Impedance
Data from STATUS Register
SO
7
6
5
4
3
2
1
0
DS21828F-page 10
? 2009 Microchip Technology Inc.
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| 25AA320AT-E/MNY | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:32K SPI Bus Serial EEPROM |
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