参数资料
| 型号： | 25AA512-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 7/36页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 512KBIT 20MHZ 8DIP |
| 标准包装： | 60 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 512K (64K x 8) |
| 速度： | 20MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1450 (CN2011-ZH PDF) |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
25AA512
2.0
FUNCTIONAL DESCRIPTION
2.1
Principles of Operation
BLOCK DIAGRAM
The 25AA512 is a 65,536 byte Serial EEPROM
designed to interface directly with the Serial Periph-
eral Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC ?
microcontrollers. It may also interface with microcon-
trollers that do not have a built-in SPI port by using
STATUS
Register
HV Generator
discrete I/O lines programmed properly in firmware to
match the SPI protocol.
The 25AA512 contains an 8-bit instruction register. The
I/O Control
Logic
Memory
Control
Logic
X
Dec
EEPROM
Array
device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
SI
Page Latches
Table 2-1 contains a list of the possible instruction
SO
Y Decoder
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
CS
SCK
HOLD
WP
V CC
V SS
Sense Amp.
R/W Control
the HOLD input and place the 25AA512 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
TABLE 2-1:
INSTRUCTION SET
Instruction Name
READ
WRITE
WREN
WRDI
RDSR
WRSR
PE
SE
CE
RDID
DPD
Instruction Format
0000 0011
0000 0010
0000 0110
0000 0100
0000 0101
0000 0001
0100 0010
1101 1000
1100 0111
1010 1011
1011 1001
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Set the write enable latch (enable write operations)
Reset the write enable latch (disable write operations)
Read STATUS register
Write STATUS register
Page Erase – erase one page in memory array
Sector Erase – erase one sector in memory array
Chip Erase – erase all sectors in memory array
Release from Deep power-down and read electronic signature
Deep Power-Down mode
? 2010 Microchip Technology Inc.
DS22021F-page 7
相关PDF资料 |
PDF描述 |
|---|---|
| 25AA512-I/SM | IC EEPROM 512KBIT 20MHZ 8SOIC |
| ACB35DHBS | CONN EDGECARD 70POS R/A .050 DIP |
| ACB40DHAS | CONN EDGECARD 80POS R/A .050 DIP |
| AGM30DTMS | CONN EDGECARD 60POS R/A .156 SLD |
| AYM30DTMS | CONN EDGECARD 60POS R/A .156 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 25AA512T-1/MF | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:512 Kbit SPI Bus Serial EEPROM |
| 25AA512T-1/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:512 Kbit SPI Bus Serial EEPROM |
| 25AA512T-1/SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:512 Kbit SPI Bus Serial EEPROM |
| 25AA512T-E/MF | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:512 Kbit SPI Bus Serial EEPROM |
| 25AA512T-E/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:512 Kbit SPI Bus Serial EEPROM |
发布紧急采购，3分钟左右您将得到回复。