参数资料
型号: 25C040/SN
厂商: Microchip Technology
文件页数: 1/22页
文件大小: 0K
描述: IC EEPROM 4KBIT 3MHZ 8SOIC
标准包装: 100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 4K (512 x 8)
速度: 3MHz
接口: SPI 3 线串行
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
产品目录页面: 1448 (CN2011-ZH PDF)
其它名称: 25C40/SN
Not recommended for new designs –
Please use 25AA040A or 25LC040A.
25AA040/25LC040/25C040
4K SPI Bus Serial EEPROM
Device Selection Table
Communication to the device can be paused via the
Part
Number
25AA040
25LC040
25C040
V CC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max. Clock
Frequency
1 MHz
2 MHz
3 MHz
Temp.
Ranges
I
I
I,E
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts. Also, write operations to the device can be
disabled via the write-protect pin (WP).
Package Types
Features:
? Low-power CMOS technology:
- Write current: 3 mA, typical
- Read current: 500 μ A, typical
- Standby current: 500 nA, typical
? 512 x 8-bit organization
? 16 byte page
? Write cycle time: 5 ms max.
? Self-timed Erase and Write cycles
PDIP
SOIC
CS
SO
WP
V SS
CS
SO
WP
V SS
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
V CC
HOLD
SCK
SI
V CC
HOLD
SCK
SI
? Block write protection:
- Protect none, 1/4, 1/2 or all of array
? Built-in write protection:
- Power on/off data protection circuitry
- Write enable latch
- Write-protect pin
TSSOP
HOLD
V CC
CS
SO
1
2
3
4
8
7
6
5
SCK
SI
V SS
WP
? Sequential read
? High reliability:
Block Diagram
- Endurance: 1M cycles
- Data retention: > 200 years
- ESD protection: > 4000V
? 8-pin PDIP, SOIC and TSSOP packages
? Temperature ranges supported:
STATUS
Register
HV Generator
- Industrial (I): -40 ° C to +85 ° C
- Automotive (E) (25C040): -40°C to +125°C
Description:
I/O Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page
The Microchip Technology Inc. 25AA040/25LC040/
25C040 (25XX040 * ) is a 4 Kbit serial Electrically
Latches
Erasable PROM. The memory is accessed via a simple
Serial Peripheral Interface (SPI) compatible serial bus.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a Chip Select (CS)
input.
*25XX040 is used in this document as a generic part number
for the 25AA040/25LC040/25C040 devices.
? 2006 Microchip Technology Inc.
SI
SO
CS
SCK
HOLD
WP
V CC
V SS
Y Decoder
Sense Amp.
R/W Control
DS21204E-page 1
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