参数资料
| 型号： | 25LC160-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 10/22页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16KBIT 2MHZ 8DIP |
| 标准包装： | 60 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 2MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1449 (CN2011-ZH PDF) |
25AA160/25LC160/25C160
3.5
Read Status Register ( RDSR )
The Write Enable Latch (WEL) bit indicates the status
The Read Status Register ( RDSR ) instruction provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
of the write enable latch. When set to a ‘ 1 ’, the latch
allows writes to the array, when set to a ‘ 0 ’, the latch
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI commands
regardless of the state of write protection on the Status
7
WPEN
6
X
5
X
4
X
3
BP1
2
BP0
1
WEL
0
WIP
register. This bit is read-only.
The Block Protection (BP0 and BP1) bits indicate
The Write-In-Process (WIP) bit indicates whether the
25XX160 is busy with a write operation. When set to a
‘ 1 ’, a write is in progress, when set to a ‘ 0 ’, no write is
in progress. This bit is read-only.
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for the RDSR timing sequence.
FIGURE 3-6:
CS
READ STATUS REGISTER TIMING SEQUENCE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
instruction
SI
0
0
0
0
0
1
0
1
High-impedance
data from Status register
SO
7
6
5
4
3
2
1
0
3.6
Write Status Register ( WRSR )
TABLE 3-2:
ARRAY PROTECTION
The Write Status register ( WRSR ) instruction allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the Status
register. The array is divided up into four segments.
The user has the ability to write-protect none, one, two
or all four of the segments of the array. The partitioning
is controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
BP1
0
0
1
1
BP0
0
1
0
1
Array Addresses
Write-Protected
none
upper 1/4
(0600h - 07FFh)
upper 1/2
(0400h - 07FFh)
all
(0000h - 07FFh)
(WPEN) bit in the Status register control the program-
mable hardware write-protect feature. Hardware write
protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes
to nonvolatile bits in the Status register are disabled.
See Table 3-3 for a matrix of functionality on the WPEN
bit.
See Figure 3-7 for the WRSR timing sequence.
DS21231D-page 10
? 2004 Microchip Technology Inc.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 25LC160T-/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K SPI Bus Serial EEPROM |
| 25LC160T/SN | 功能描述:电可擦除可编程只读存储器 2kx8 - 2.5V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 25LC160T-/SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K SPI Bus Serial EEPROM |
| 25LC160T-E/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K SPI Bus Serial EEPROM |
| 25LC160T-E/SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K SPI Bus Serial EEPROM |
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