- 您现在的位置：买卖IC网 > PDF目录4240 > 25LC256X-E/ST (Microchip Technology)IC EEPROM 256KBIT 10MHZ 8TSSOP PDF资料下载
参数资料
| 型号： | 25LC256X-E/ST |
| 厂商： | Microchip Technology |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 256KBIT 10MHZ 8TSSOP |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 256K (32K x 8) |
| 速度： | 10MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 管件 |
25AA256/25LC256
2.6
Write Status Register Instruction
See Figure 2-7 for the WRSR timing sequence.
( WRSR )
The Write Status Register instruction ( WRSR ) allows the
TABLE 2-3:
ARRAY PROTECTION
user to write to the nonvolatile bits in the STATUS
register as shown in Table 2-2. The user is able to
select one of four levels of protection for the array by
writing to the appropriate bits in the STATUS register.
The array is divided up into four segments. The user
has the ability to write-protect none, one, two, or all four
of the segments of the array. The partitioning is
controlled as shown in Table 2-3.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
BP1
0
0
1
1
BP0
0
1
0
1
Array Addresses
Write-Protected
none
upper 1/4
(6000h-7FFFh)
upper 1/2
(4000h-7FFFh)
all
(0000h-7FFFh)
(WPEN) bit in the STATUS register control the
programmable hardware write-protect feature. Hard-
ware write protection is enabled when WP pin is low
and the WPEN bit is high. Hardware write protection is
disabled when either the WP pin is high or the WPEN
bit is low. When the chip is hardware write-protected,
only writes to nonvolatile bits in the STATUS register
are disabled. See Table 2-1 for a matrix of functionality
on the WPEN bit.
FIGURE 2-7:
CS
WRITE STATUS REGISTER TIMING SEQUENCE ( WRSR )
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
Data to STATUS Register
SI
0
0
0
0
0
0
0
1
7
6
5
4
3
2
1
0
High-Impedance
SO
Note:
An internal write cycle (T WC ) is initiated on the rising edge of CS after a valid write STATUS register
sequence.
? 2007 Microchip Technology Inc.
DS21822F-page 11
相关PDF资料 |
PDF描述 |
|---|---|
| 25LC256T-E/ST | IC EEPROM 256KBIT 10MHZ 8TSSOP |
| 25LC256-E/ST | IC EEPROM 256KBIT 10MHZ 8TSSOP |
| XC6SLX100T-2FG900I | IC FPGA SPARTAN 6 900FGGBGA |
| XC6SLX100T-2FGG900I | IC FPGA SPARTAN 6 101K 900FGGBGA |
| SST39SF010A-70-4C-WHE-T | IC FLASH MPF 1MBIT 70NS 32TSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 25LC256X-I/ST | 功能描述:电可擦除可编程只读存储器 256k 32KX8 2.5V SER EE IND RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 25LC256XIMF | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:256K SPI Bus Serial EEPROM |
| 25LC256XIP | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:256K SPI Bus Serial EEPROM |
| 25LC256XISM | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:256K SPI Bus Serial EEPROM |
| 25LC256XISN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:256K SPI Bus Serial EEPROM |
发布紧急采购，3分钟左右您将得到回复。