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参数资料
| 型号： | 29400 |
| 厂商： | AMIC Technology Corporation |
| 英文描述： | 512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| 中文描述： | 为512k × 8位/ 256 × 16位的CMOS 5.0伏只，引导扇区闪存 |
| 文件页数： | 12/33页 |
| 文件大小： | 497K |
| 代理商： | 29400 |
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A29400 Series
PRELIMINARY (February, 2001, Version 0.1)
12
AMIC Technology, Inc.
Table 5. A29400 Command Definitions
Bus Cycles (Notes 2 - 5)
Third
Addr Data Addr Data Addr Data Addr Data
First
Second
Fourth
Fifth
Sixth
Command
Sequence
(Note 1)
C
Addr Data Addr Data
Read (Note 6)
1
RA
RD
Reset (Note 7)
1
XXX
F0
Word
Byte
Word
Byte
555
AAA
555
2AA
555
2AA
555
AAA
555
Manufacturer ID
4
AA
55
90
X00
37
X01 B3B0
Device ID,
Top Boot Block
4
AAA
AA
555
55
AAA
90
X02
X01 B331
B0
Word
555
2AA
555
Device ID,
Bottom Boot Block
Byte
4
AAA
AA
555
55
AAA
90
X02
31
Word
555
2AA
555
X03
Continuation ID
Byte
4
AAA
AA
555
55
AAA
90
X06
7F
XX00
Word
555
2AA
555
(SA)
X02 XX01
00
01
A
Sector Protect Verify
(Note 9)
Byte
4
AAA
AA
555
55
AAA
90
(SA)
X04
Word
Byte
Word
Byte
Word
Byte
555
AAA
555
AAA
555
AAA
XXX
2AA
555
2AA
555
2AA
555
555
AAA
555
AAA
555
AAA
Program
4
AA
55
A0
PA
PD
555
AAA
555
AAA
2AA
555
2AA
555
555
AAA
Chip Erase
6
AA
55
80
AA
55
10
Sector Erase
6
AA
55
80
AA
55
SA
30
Erase Suspend (Note 9)
1
B0
Erase Resume (Note 10)
1
XXX
30
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the
WE
or
CE
pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of
WE
or
CE
pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A12 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Address bits A17 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
5. No unlock or command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O
5
goes high
(while the device is providing status data).
7. The fourth cycle of the autoselect command sequence is a read cycle.
8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more information.
9. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
10. The Erase Resume command is valid only during the Erase Suspend mode.
11. The time between each command cycle has to be less than 50
μ
s.
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