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| 型号： | 34RC02 |
| 元件分类： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 该CAT24FC02是一个2 KB的EEPROM的国内256个8位每字举办的串行CMOS |
| 文件页数： | 14/16页 |
| 文件大小： | 445K |
| 代理商： | 34RC02 |
CAT34RC02
7
Doc No. 1052, Rev. K
The PSWP flag can be set (forever) by issuing a ‘Byte
Write’ command, with the Slave address preamble set to
‘6h’, followed by a ‘don’t care’ address, followed by ‘don’t
care’ data and a STOP condition. The CAT34RC02 will
acknowledge the Slave address, dummy byte address
and dummy data (Fig. 10). The PSWP flag will be
permanently set (after the internal write cycle is
completed).
The SWP commands are shown in Table 1.
Table 1. SWP Commands
s
e
r
d
A
e
v
a
l
S
N
I
Pe
l
b
m
a
e
r
Ps
s
e
r
d
A
e
c
i
v
e
DR/
W
d
n
a
m
o
C2
A1
A0
A7
B6
B5
B4
B3
B2
B1
B0
B
P
W
S
D
A
E
R
2
A1
A0
1
0
2
A1
A0
A1
T
E
S
P
W
S
R0
0
V
H
V0
1
0
1
0
P
W
S
R
A
E
L
C
01
V
H
V0
1
0
1
0
T
E
S
P
W
S
P2
A1
A0
1
0
2
A1
A0
The CAT34RC02 will not acknowledge RSWP or PSWP
commands, once the PSWP flag is set. If the PSWP flag
is not set, but the WP pin is HIGH, then the CAT34RC02
will react to RSWP or PSWP commands as follows: if the
command attempts to ‘flip’ one of the two SWP switches,
then the CAT34RC02 will respond the same way the
regular memory would, i.e. the command and address
(in this case dummy) are acknowledged, but the data (in
this case dummy) will not be acknowledged; if the
command attempts to ‘reaffirm’ one of the two switches,
then the CAT34RC02 will not acknowledge the command
itself. In addition, the CAT34RC02 will not acknowledge
a ‘reaffirming’ SWP command, even if the WP pin is
LOW.
Power-On Reset (POR)
The CAT34RC02 incorporates Power-On Reset (POR)
circuitry which protects the device against malfunctioning
while VCC is lower than the recommended operating
voltage.
The device will power up into a read-only state and will
power-down into a reset state when VCC crosses the
POR level of ~1.3V.
READ OPERATIONS
Immediate Address Read
In standby mode, the CAT34RC02 internal address
counter points to the data byte immediately following the
last byte accessed by a previous operation. If the
‘previous’ byte was the last byte in memory, then the
address counter will point to the first memory byte, etc.
If the CAT34RC02 decodes a Slave address with a ‘1’ in
the R/
W bit position (Fig. 8), it will issue an ACK in the 9th
clock cycle, and will then transmit the data byte being
pointed at by the address counter. The Master can then
stop further transmission by issuing a NoACK, followed
by a STOP condition.
Selective Read
The READ operation can also be started at an address
different from the one stored in the address counter. The
Figure 8. Immediate Address Read Timing
SCL
SDA
8th Bit
STOP
NO ACK
DATA OUT
89
SLAVE
ADDRESS
S
A
C
K
DATA
N
O
A
C
K
S
T
O
P
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
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| 34RC02JI | 功能描述:电可擦除可编程只读存储器 2kb 1.7-5.5V Ind I2C RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 34RC02JI-TE13 | 功能描述:电可擦除可编程只读存储器 2kb 1.7-5.5V Ind I2C RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 34RC02PE | 功能描述:电可擦除可编程只读存储器 2kb 1.7-5.5V Ext I2C RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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