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| 型号： | 4244-00 |
| 厂商： | Peregrine Semiconductor |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR 4244 RF SWITCH |
| 标准包装： | 1 |
| 系列： | UltraCMOS™ |
| 类型： | 开关，SPDT |
| 频率： | 0Hz ~ 3GHz |
| 适用于相关产品： | PE4244 |
| 已供物品： | 板 |
| 其它名称： | 4244-0 4244-0-ND PE4244 EK |
PE4244
Product Specification
Figure 3. Pin Configuration (Top View)
Table 3. Absolute Maximum Ratings
V DD
1
8
RF1
Symbol
Parameter/Conditions
Min
Max
Units
V DD
Power supply voltage
-0.3
4.0
V
CTRL
GND
RFC
2
3
4
4244
7
6
5
GND
GND
RF2
V I
T ST
T OP
Voltage on any input
Storage temperature range
Operating temperature
-0.3
-65
-40
V DD +
150
85
V
°C
°C
Table 2. Pin Descriptions
P IN
Input power (50 ? )
30
dBm
Pin No.
Pin Name
Description
V ESD
ESD voltage (Human Body
1500
V
1
2
3
V DD
CTRL
GND
Nominal 3V supply connection. A bypass
capacitor (100 pF) to the ground plane
should be placed as close as possible to
the pin
CMOS logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
Ground connection. Traces should be
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
physically short and connected to ground
Table 4. DC Electrical Specifications
4
5
6
RFC
RF2
GND
Common RF port for switch (Note 1)
RF2 port (Note 1)
Ground Connection. Traces should be
Parameter
V DD Power Supply Voltage
Min
2.7
Typ
3.0
Max
3.3
Units
V
physically short and connected to ground
I DD Power Supply Current
V DD = 3V, V CNTL = 3V
250
500
nA
7
GND
Ground Connection. Traces should be
physically short and connected to ground
Control Voltage High
Control Voltage Low
0.7xV DD
0.3xV DD
V
V
8 RF1 RF1 port (Note 1)
Note 1: All RF pins must be DC blocked with an external series
capacitor or held at 0 V DC
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
5x5 mm QFN package is MSL1.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS ? device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS ?
devices are immune to latch-up.
Table 5. Control Logic Truth Table
Control Voltage
CTRL = CMOS High
CTRL = CMOS Low
Signal Path
RFC to RF1
RFC to RF2
?2005-2013 Peregrine Semiconductor Corp. All rights reserved.
Document No. DOC-30006-2 │ UltraCMOS ? RFIC Solutions
Page 2 of 6
Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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