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参数资料
| 型号： | 477R-05IT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28 |
| 封装： | 0.150 INCH, SSOP-28 |
| 文件页数： | 2/8页 |
| 文件大小： | 192K |
| 代理商： | 477R-05IT |
ICS477-05
QUAD PLL WITH VCXO FOR HDTV
VCXO AND SYNTHESIZER
IDT / ICS QUAD PLL WITH VCXO FOR HDTV
2
ICS477-05
REV H 062404
Pin Assignment
Pin Descriptions
17
16
9
15
GN D
12
13
14
GN D
NC
27M
N C
27M
20
74.175M
18
11
GN D
54.054M
GN D
54M
19
10
28 p in (1 50 m il) S S O P
82 1
7
GN D
G N D
22
V D D
5
VD D
V D D
24
V D D
23
6
42 5
3
GN D
VIN
G N D
26
P D T S
1
X1
GN D
V D D
28
X 2
27
2
Pin
Number
Pin
Name
Pin Type
Pin Description
1
XI
Input
Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
2
GND
Power
Connect to ground.
3
GND
Power
Connect to ground.
4
VIN
Input
VCXO Voltage input. Zero to 3.3 V analog control voltage for VCXO.
5, 6, 22, 23,
24, 27
VDD
Power
Connect to +3.3 V.
7, 8, 9, 10, 19,
20, 21
GND
Power
Connect to ground.
11
54.054M
Output
54.054 MHz clock output. Weak internal pull-down when tri-state.
12, 13, 17
NC
-
No connect. Do not connect anything to these pins.
14
74.175M
Output
74.175 MHz clock output. Weak internal pull-down when tri-state.
15, 16
27M
Output
27 MHz reference clock output. Weak internal pull-down when tri-state.
18
54M
Output
54 MHz clock output. Weak internal pull-down when tri-state.
25
GND
Power
Connect to ground.
26
PDTS
Input
Powers down entire chip. Tri-states CLK outputs when low. Internal pull-up.
28
X2
Input
Crystal connection. Connect to a 27 MHz fundamental mode pullable crystal.
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PDF描述 |
|---|---|
| 477R-05ILFT | 74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28 |
| 477R-05ILF | 74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28 |
| 477R-05I | 74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28 |
| 477R-05T | 74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28 |
| 48-213/R6C-AM1N2VY/3C | SINGLE COLOR LED, BRILLIANT RED, 1.2 mm |
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