参数资料
型号: 48SD6404
厂商: Maxwell Technologies, Inc
英文描述: CAP 2.2UF 50V CERAMIC MONO 20%
中文描述: 256 MB的SDRAM的16梅格× 4位× 4,银行
文件页数: 18/42页
文件大小: 596K
代理商: 48SD6404
48SD6404
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All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM
01.11.05 Rev 2
Command Intervals
READ command to READ command interval
1. Same bank, same ROW address: When another read command is executed at the same ROW address
of the same bank as the preceding read command execution, the second read can be performed after an
interval of no less than 1 clock. Even when the first command is a burst read that is not yet finished, the data
read by second command will be valid.
READ to READ Command Interval (Same ROW address in same bank)
2. Same bank, different ROW address: When the ROW address changes on the same bank, consecutive
read commands cannot be executed; it is necessary to separate the two read commands with a precharge
command and a bank-active command.
3. Different bank: When the bank changes, the second read can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. Even when the first command is a burst
read that is not yet finished, the data read by the second command will be valid.
READ to READ Command Interval ( Different Bank)
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