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参数资料
| 型号： | 502MLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 190 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封装： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件页数： | 1/7页 |
| 文件大小： | 181K |
| 代理商： | 502MLFT |
DATASHEET
LOCO PLL CLOCK MULTIPLIER
ICS502
IDT / ICS LOCO PLL CLOCK MULTIPLIER
1
ICS502
REV L 092209
Description
The ICS502 LOCOTM is the most cost effective way to
generate a high-quality, high-frequency clock output and a
reference from a lower frequency crystal or clock input. The
name LOCO stands for Low Cost Oscillator, as it is
designed to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques, the
device uses a standard fundamental mode, inexpensive
crystal to produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate six
different multiplication factors, allowing one chip to output
many common frequencies (see table on page 2).
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed. For
applications which require defined input to output skew, use
the ICS570B.
Features
Packaged as 8-pin SOIC or die
Available in Pb (lead) free package
IDT’s lowest cost PLL clock
Zero ppm multiplication error
Easy to cascade with ICS5xx series
Input crystal frequency of 5 – 27 MHz
Input clock frequency of 2 – 50 MHz
Output clock frequencies up to 190 MHz
Low jitter – 50 ps one sigma
Compatible with all popular CPUs
Duty cycle of 45/55 up to 160 MHz
Operating voltages of 3.0 to 5.5 V
25 mA drive capability at TTL levels
Industrial temperature version available
Advanced, low-power CMOS process
NOTE: EOL for non-green parts to occur on 5/13/10
per PDN U-09-01
Block Diagram
PLL Clock
M ultiplier
Circuitry and
ROM
Crystal or
Clock input
VDD
Crystal
O Scillator
S1, S0
X1/ICLK
X2
2
CLK
REF
GND
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