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参数资料
| 型号： | 571UFAFREQDG |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT |
| 封装： | ROHS COMPLIANT PACKAGE-8 |
| 文件页数： | 7/26页 |
| 文件大小： | 315K |
| 代理商： | 571UFAFREQDG |
Si570/Si571
Rev. 0.31
15
Register 7. High Speed/N1 Dividers
Bit
D7D6D5D4D3D2D1D0
Name
HS_DIV[2:0]
N1[6:2]
Type
R/W
Bit
Name
Function
7:5
HS_DIV[2:0]
DCO High Speed Divider.
Sets value for high speed divider that takes the DCO output fOSC as its clock input.
000 = 4
001 = 5
010 = 6
011 = 7
100 = Not used.
101 = 9
110 = Not used.
111 = 11
4:0
N1[6:2]
CLKOUT Output Divider.
Sets value for CLKOUT output divider. Allowed values are [1] and [2, 4, 6, ..., 27]. Illegal
odd divider values will be rounded up to the nearest even value. The value for the N1 reg-
ister can be calculated by taking the divider ratio minus one. For example, to divide by 10,
write 0001001 (9 decimal) to the N1 registers.
0000000 = 1
1111111 = 27
Register 8. Reference Frequency
Bit
D7D6D5D4D3D2D1D0
Name
N1[1:0]
RFREQ[37:32]
Type
R/W
Bit
Name
Function
7:6
N1[1:0]
CLKOUT Output Divider.
Sets value for CLKOUT output divider. Allowed values are [1, 2, 4, 6, ..., 27]. Illegal odd
divider values will be rounded up to the nearest even value. The value for the N1 regis-
ter can be calculated by taking the divider ratio minus one. For example, to divide by
10, write 0001001 (9 decimal) to the N1 registers.
0000000 = 1
1111111 = 27
5:0
RFREQ[37:32]
Reference Frequency.
Frequency control input to DCO.
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