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参数资料
| 型号： | 5962-89920022A |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 0.4 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, CQCC20 |
| 封装： | LCC-20 |
| 文件页数： | 7/12页 |
| 文件大小： | 978K |
| 代理商： | 5962-89920022A |
PWM CONTROL
1. Oscillator
Generates a fixed-frequency internal clock from an external RT and CT.
Frequency =
KC
RTCT
where KC is a first order correction factor
≈ 0.3 log (CT X 1012).
2. Ramp Generator
Develops a linear ramp with a slope defined externally by
dv
dt
=
sense voltage
RRCR
CR is normally selected
≤ CT and its value will have some effect upon valley voltage.
Limiting the minimum value for ISENSE will establish a maximum duty cycle clamp.
CR terminal can be used as an input port for current mode control.
3. Error Amplifier
Conventional operational amplifier for closed-loop gain and phase compensation.
Low output impedance; unity-gain stable.
The output is held low by the slow start voltage at turn on in order to minimize overshoot.
4. Reference Generator
Precision 5.0V for internal and external usage to 50mA.
Tracking 3.0V reference for internal usage only with nominal accuracy of
± 2%.
40V clamp zener for chip OV protection, 100mA maximum current.
5. PWM Comparator
Generates output pulse which starts at termination of clock pulse and ends when the ramp
input crosses the lowest of two positive inputs.
6. PWM Latch
Terminates the PWM output pulse when set by inputs from either the PWM comparator, the
pulse-by-pulse current limit comparator, or the error latch. Resets with each internal clock
pulse.
7. PWM Output Switch
Transistor capable of sinking current to ground which is off during the PWM on-time and turns
on to terminate the power pulse. Current capacity is 400mA saturated with peak
capacitance discharge in excess of one amp.
SEQUENCING FUNCTIONS
1. Start/UV Sense
With an increasing voltage, it generates a turn-on signal and releases the slow-start clamp at
a start threshold.
With a decreasing voltage, it generates a turn-off command at a lower level separated by a
200
A hysteresis current.
2. Drive Switch
Disables most of the chip to hold internal current consumption low, and Driver Bias OFF, until
input voltage reaches start threshold.
3. Driver Bias
Supplies drive current to external power switch to provide turn-on bias.
4. Slow Start
Clamps low to hold PWM OFF. Upon release, rises with rate controlled by RSCS for slow
increase of output pulse width.
Can also be used as an alternate maximum duty cycle clamp with an external voltage divider.
PROTECTION FUNCTIONS
1. Error Latch
When set by momentary input, this latch insures immediate PWM shutdown and hold off until
reset. Inputs to Error Latch are:
a. OV > 3.2V (typically 3V)
b. Stop > 2.4V (typically 1.6V)
c. Current Sense 400mV over threshold (typical).
Error Latch resets when slow start voltage falls to 0.4V if Reset Pin 5 < 2.8V. With Pin 5 >
3.2V, Error Latch will remain set.
2. Current Limiting
Differential input comparator terminates individual output pulses each time sense voltage
rises above threshold.
When sense voltage rises to 400mV (typical) above threshold, a shutdown signal is sent to
Error Latch.
3. External Stop
A voltage over 1.2V will set the Error Latch and hold the output off.
A voltage less than 0.8V will defeat the error latch and prevent shutdown.
A capacitor here will slow the action of the error latch for transient protection by providing a
typical delay of 13ms/
F.
UC1841
UC2841
UC3841
FUNCTIONAL DESCRIPTION
4
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