参数资料
型号: 5962R0722601VZA
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: DAC
英文描述: SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 12-BIT DAC, CDSO10
封装: CERAMIC, SOIC-10
文件页数: 11/24页
文件大小: 502K
代理商: 5962R0722601VZA
30018015
FIGURE 11. Using the LP3985 regulator
An input capacitance of 1.0F without any ESR requirement
is required at the LP3985 input, while a 1.0F ceramic ca-
pacitor with an ESR requirement of 5m
to 500m is required
at the output. Careful interpretation and understanding of the
capacitor specification is required to ensure correct device
operation.
2.2.4 LP2980
The LP2980 is an ultra low dropout regulator with a 0.5% or
1.0% accuracy over temperature, depending upon grade. It is
available in 3.0V, 3.3V and 5V versions, among others.
30018016
FIGURE 12. Using the LP2980 regulator
Like any low dropout regulator, the LP2980 requires an output
capacitor for loop stability. This output capacitor must be at
least 1.0F over temperature, but values of 2.2F or more will
provide even better performance. The ESR of this capacitor
should be within the range specified in the LP2980 data sheet.
Surface-mount solid tantalum capacitors offer a good combi-
nation of small size and ESR. Ceramic capacitors are attrac-
tive due to their small size but generally have ESR values that
are too low for use with the LP2980. Aluminum electrolytic
capacitors are typically not a good choice due to their large
size and have ESR values that may be too high at low tem-
peratures.
2.3 BIPOLAR OPERATION
The DAC121S101 is designed for single supply operation and
thus has a unipolar output. However, a bipolar output may be
obtained with the circuit in Figure 13. This circuit will provide
an output voltage range of ±5 Volts. A rail-to-rail amplifier
should be used if the amplifier supplies are limited to ±5V.
30018017
FIGURE 13. Bipolar Operation
The output voltage of this circuit for any code is found to be
V
O = (VA x (D / 4096) x ((R1 + R2) / R1) - VA x R2 / R1)
where D is the input code in decimal form. With VA = 5V and
R1 = R2,
V
O = (10 x D / 4096) - 5V
A list of rail-to-rail amplifiers suitable for this application are
indicated in Table 2.
TABLE 2. Some Rail-to-Rail Amplifiers
AMP
PKGS
Typ V
OS
Typ I
SUPPLY
LMC7111
DIP-8
SOT23-5
0.9 mV
25 A
LM7301
SO-8
SOT23-5
0.03 mV
620 A
LM8261
SOT23-5
0.7 mV
1 mA
2.4 LAYOUT, GROUNDING, AND BYPASSING
For best accuracy and minimum noise, the printed circuit
board containing the DAC121S101 should have separate
analog and digital areas. The areas are defined by the loca-
tions of the analog and digital power planes. Both of these
planes should be located in the same board layer. There
should be a single ground plane. A single ground plane is
preferred if digital return current does not flow through the
analog ground area. Frequently a single ground plane design
will utilize a "fencing" technique to prevent the mixing of ana-
log and digital ground current. Separate ground planes should
only be utilized when the fencing technique is inadequate.
The separate ground planes must be connected in one place,
preferably near the DAC121S101. Special care is required to
guarantee that digital signals with fast edge rates do not pass
over split ground planes. They must always have a continu-
ous return path below their traces.
The DAC121S101 power supply should be bypassed with a
10F and a 0.1F capacitor as close as possible to the device
with the 0.1F right at the device supply pin. The 10F ca-
pacitor should be a tantalum type and the 0.1F capacitor
should be a low ESL, low ESR type. The power supply for the
DAC121S101 should only be used for analog circuits.
Avoid crossover of analog and digital signals and keep the
clock and data lines on the component side of the board. The
clock and data lines should have controlled impedances.
19
www.national.com
DAC121S101QML
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