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| 型号： | 5962R0724902QPC |
| 厂商： | INTERSIL CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 1 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP8 |
| 封装： | ROHS COMPLIANT, HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-8 |
| 文件页数： | 15/15页 |
| 文件大小： | 760K |
| 代理商： | 5962R0724902QPC |
ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH
9
FN6991.1
August 19, 2010
the average output current can be calculated from
Equation 5:
To optimize noise immunity, bypass VDD to GND with a
ceramic capacitor as close to the VDD and GND pins as
possible.
VREF - The 5.00V reference voltage output. +1.0/-1.5%
tolerance over line, load and operating temperature. The
recommended bypass to GND cap is in the range 0.1F
to 0.22F. A typical value of 0.15F can be used.
Functional Description
Features
The ISL7884xASRH current mode PWM makes an ideal
choice for low-cost flyback and forward topology
applications. With its greatly improved performance over
industry standard parts, it is the obvious choice for new
designs or existing designs which require updating.
Oscillator
The ISL7884xASRH has a sawtooth oscillator with a
programmable frequency range to 2MHz, which can be
programmed with a resistor from VREF and a capacitor to
GND on the RTCT pin. (Please refer to Figure 4 for the
resistor and capacitance required for a given frequency).
Soft-Start Operation
Soft-start must be implemented externally. One method,
illustrated below, clamps the voltage on COMP.
The COMP pin is clamped to the voltage on capacitor C1
plus a base-emitter junction by transistor Q1. C1 is
charged from VREF through resistor R1 and the base
current of Q1. At power-up C1 is fully discharged, COMP
is at ~0.7V, and the duty cycle is zero. As C1 charges,
the voltage on COMP increases, and the duty cycle
increases in proportion to the voltage on C1. When COMP
reaches the steady state operating point, the control loop
takes over and soft start is complete. C1 continues to
charge up to VREF and no longer affects COMP. During
power down, diode D1 quickly discharges C1 so that the
soft start circuit is properly initialized prior to the next
power on sequence.
Gate Drive
The ISL7884xASRH is capable of sourcing and sinking 1A
peak current. To limit the peak current through the IC, an
optional external resistor may be placed between the
totem-pole output of the IC (OUT pin) and the gate of
the MOSFET. This small series resistor also damps any
oscillations caused by the resonant tank of the parasitic
inductances in the traces of the board and the FET’s input
capacitance. TID environment of >50krads requires the
use of a bleeder resistor of 10k from OUT pin to GND.
Slope Compensation
For applications where the maximum duty cycle is less
than 50%, slope compensation may be used to improve
noise immunity, particularly at lighter loads. The amount
of slope compensation required for noise immunity is
determined empirically, but is generally about 10% of the
full scale current feedback signal. For applications where
the duty cycle is greater than 50%, slope compensation
is required to prevent instability.
Slope compensation may be accomplished by summing
an external ramp with the current feedback signal or by
subtracting the external ramp from the voltage feedback
error signal. Adding the external ramp to the current
feedback signal is the more popular method.
From the small signal current-mode model [1] it can be
shown that the naturally-sampled modulator gain, Fm,
without slope compensation is calculated in Equation 6:
where Sn is the slope of the sawtooth signal and tsw is
the duration of the half-cycle. When an external ramp is
added, the modulator gain becomes Equation 7:
where Se is slope of the external ramp and becomes
Equation 8:
The criteria for determining the correct amount of
external ramp can be determined by appropriately
setting the damping factor of the double-pole located at
the switching frequency. The double-pole will be critically
damped if the Q-factor is set to 1, over-damped for Q <
1, and under-damped for Q > 1. An under-damped
condition may result in current loop instability.
I
OUT
Qg
f
×
=
(EQ. 5)
FIGURE 5. SOFT-START
VREF
COMP
GND
ISL788
4xAS
RH
C1
Q1
D1
R1
Fm
1
SnTsw
--------------------
=
(EQ. 6)
Fm
1
Sn
Se
+
()tsw
-------------------------------------
1
m
c Sntsw
--------------------------
==
(EQ. 7)
m
c
1
Se
Sn
-------
+
=
(EQ. 8)
Q
1
π m
c 1D
–
() 0.5
–
()
-------------------------------------------------
=
(EQ. 9)
ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH
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