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参数资料
| 型号： | 5962R1023304QXC |
| 元件分类： | 多路复用及模拟开关 |
| 英文描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 封装： | CERAMIC, DFP-28 |
| 文件页数： | 4/23页 |
| 文件大小： | 474K |
| 代理商： | 5962R1023304QXC |
12
TIMING CHARACTERISTICS (UT16MX111)1,2
(AVDD=5.0V + 0.5V; -55C < TC < +125C)
Notes:
1. For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25oC per MIL-STD-883 Method 1019,
ConditionA up to the maximum TID level procured (see ordering information)
2. Continuous operation with low load resistance is not recommended. (See Figure 11)
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
tPROP_S
Propagation delay of analog input
(S[x]) to analog output (COM).
RT = 50
CL = 50pF
25
ns
tPROP_D
Propagation delay of any changes
in the digital inputs (A[3:0], CS,
PLATCH, SS) affecting the analog
output (COM).
RT = 50
CL = 50pF
See Figures 6 & 12.
25
140
ns
tMUX
Mux decoding time
RT = 50
CL = 50pF
See Figures 6 & 12.
50
ns
tBBM
Break-Before-Make-Delay
RT = 50
CL = 50pF
See Figures 6 & 12.
15
90
ns
tPZLH
Output enable time from HiZ to
Low or High once RESET is
pulled low.
RT = 50
CL = 50pF
See Figures 9 & 12.
90
ns
tPLHZ
Output disable time from Low or
High to HiZ once RESET is pulled
high.
RT = 50
CL = 50pF
See Figures 9 & 12.
55
ns
tLSU
The minimum amount of time that
the addresses should be set before
the rising edge of PLATCH.
See Figure 6.
5.0
ns
tLHD
The minimum amount of time that
the addresses should be held after
the rising edge of PLATCH.
See Figure 6.
10
ns
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