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参数资料
| 型号： | 5M240ZM100I5N |
| 厂商： | Altera |
| 文件页数： | 2/30页 |
| 文件大小： | 0K |
| 描述： | IC MAX V CPLD 240 LE 100-MBGA |
| 产品培训模块： | Max V Overview |
| 特色产品： | MAX? V CPLDs |
| 标准包装： | 429 |
| 系列： | MAX® V |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 7.5ns |
| 电压电源 - 内部： | 1.71 V ~ 1.89 V |
| 逻辑元件/逻辑块数目： | 240 |
| 宏单元数： | 192 |
| 输入/输出数： | 79 |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TFBGA |
| 供应商设备封装： | 100-MBGA（6x6） |
| 包装： | 托盘 |
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3–2
Chapter 3: DC and Switching Characteristics for MAX V Devices
Operating Conditions
Recommended Operating Conditions
Table 3–2. Recommended Operating Conditions for MAX V Devices
Symbol
V CCINT (1)
V CCIO (1)
V I
V O
T J
Parameter
1.8-V supply voltage for internal logic and
in-system programming (ISP)
Supply voltage for I/O buffers, 3.3-V
operation
Supply voltage for I/O buffers, 2.5-V
operation
Supply voltage for I/O buffers, 1.8-V
operation
Supply voltage for I/O buffers, 1.5-V
operation
Supply voltage for I/O buffers, 1.2-V
operation
Input voltage
Output voltage
Operating junction temperature
Conditions
MAX V devices
—
—
—
—
—
—
Commercial range
Industrial range
Extended range (5)
Minimum
1.71
3.00
2.375
1.71
1.425
1.14
–0.5
0
0
–40
–40
Maximum
1.89
3.60
2.625
1.89
1.575
1.26
4.0
V CCIO
85
100
125
Unit
V
V
V
V
V
V
V
V
°C
°C
°C
(1) MAX V device ISP and/or user flash memory (UFM) programming using JTAG or logic array is not guaranteed outside the recommended
operating conditions (for example, if brown-out occurs in the system during a potential write/program sequence to the UFM, Altera recommends
that you read back the UFM contents and verify it against the intended write data).
(2) The minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents less than 100 mA and periods
shorter than 20 ns.
(3) During transitions, the inputs may overshoot to the voltages shown below based on the input duty cycle. The DC case is equivalent to 100%
duty cycle. For more information about 5.0-V tolerance, refer to the Using MAX V Devices in Multi-Voltage Systems chapter.
V IN
Max. Duty Cycle
4.0 V 100% (DC)
4.1 V 90%
4.2 V 50%
4.3 V 30%
4.4 V 17%
4.5 V 10%
(4) All pins, including the clock, I/O, and JTAG pins, may be driven before V CCINT and V CCIO are powered.
(5) For the extended temperature range of 100 to 125°C, MAX V UFM programming (erase/write) is only supported using the JTAG interface. UFM
programming using the logic array interface is not guaranteed in this range.
May 2011
Altera Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 5M240ZM64A4N | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:MAX V Device Handbook |
| 5M240ZM64C5N | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:MAX V Device Handbook |
| 5M240ZM6815N | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:DC and Switching Characteristics for MAX V Devices |
| 5M240ZM68A5N | 功能描述:CPLD - 复杂可编程逻辑器件 192 Macrocells Flash 52 IOs 1.8 V 25 uA RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| 5M240ZM68C4 | 制造商:Altera Corporation 功能描述:IC CPLD 192MC 7.5NS 68MBGA |
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