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参数资料
| 型号： | 5S12.080SIP |
| 元件分类： | 电源模块 |
| 英文描述： | 1-OUTPUT 1 W DC-DC REG PWR SUPPLY MODULE |
| 封装： | SIP-4 |
| 文件页数： | 3/4页 |
| 文件大小： | 103K |
| 代理商： | 5S12.080SIP |
A
1 Watt SIP Single Series DC/DC Converters
2401 Stanwell Drive Concord, California 94520 Ph: 925/687-4411 or 800/542-3355 Fax: 925/687-3333 www.calex.com Email: sales@calex.com
3
3/2001
inductor L2 appropriately for the maximum expected load
current. All the ground connections must be as short as
possible back to the CMN pin. The filter should be placed as
close as possible to the converter, even if your load is at some
distance.
Figure 3.
This circuit can reduce the output noise to below 4mV P-P over a 20
MHz bw. Size L2 for the maximum expected load current. Place as
close as possible to the converter.
Negative Outputs
A negative output voltage is obtained by connecting the
+Output pin to the low side of the load, and taking the negative
output from the CMN pin of the converter.
Grounding
The input and output sections are fully floating and isolated
from each other. They may be operated fully floating or with
a common connection between the input and output.
Mechanical tolerances unless otherwise noted:
X.XX dimensions: ±0.020 inches
X.XXX dimensions: ±0.010 inches
Very Low Noise Input Circuit
Figure 2 shows a very low noise input circuit that may be used
with the converters. This circuit will reduce the input reflected
ripple current to less than 5 mA peak to peak. L1 should be
sized to handle the maximum DC current of your application.
C1 must be used if L1 is required in the circuit.
Figure 2.
This circuit will reduce the input reflected ripple current to less than
5 mA peak to peak. See the discussion in the text for selecting C1
and L1.
Applying The Output
Figure 1 shows the typical output connection for the converter.
C2 is required to filter the output. It must be 10F minimum
and can be made up of from the bypass capacitors already
used in your application. Increasing C2 will lower the output
noise.
Operation With Light Loads
This converter uses a semi-regulated design. The output
voltage will vary as the load is changed, increasing as the load
is decreased. See the Output Voltage vs. Output Load curve.
Operation With Changing Input Voltage
The output will change proportionally to a change in the input
voltage. The typical output voltage change is 1.2% per %
change in input voltage.
Low Noise Output Circuit
The circuit shown in Figure 3 can be used to reduce the output
noise to below 4 mV p-p over a 20 MHz bandwidth. Size
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C1 = 10F
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