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参数资料
| 型号： | 6N135SDM |
| 厂商： | Fairchild Optoelectronics Group |
| 文件页数： | 6/19页 |
| 文件大小： | 0K |
| 描述： | OPTOCOUPLER TRANS 1CH 8-SMDIP |
| 标准包装： | 1,000 |
| 通道数： | 1 |
| 输入类型： | DC |
| 电压 - 隔离： | 5000Vrms |
| 电流传输比（最小值）： | 7% @ 16mA |
| 电流传输比（最大）： | 50% @ 16mA |
| 输出电压： | -0.5 ~ 20 V |
| 电流 - 输出 / 通道： | 8mA |
| 电流 - DC 正向(If)： | 25mA |
| 输出类型： | 有 Vcc 的晶体管 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SMD，鸥翼型 |
| 包装： | 带卷 (TR) |
Electrical Characteristics
(Continued)
T A = 0 to 70°C unless otherwise speci?ed. Typical values are measured at T A = 25°C and V CC = 5V.
Switching Characteristics (V CC = 5V)
Symbol Parameter
Test Conditions
Device
Min.
Typ.
Max.
Unit
t PHL
Propagation Delay
Time to Logic LOW
T A = 25°C, R L = 4.1 k Ω ,
I F = 16 mA (6) (Figure 15)
R L = 1.9 k Ω , I F = 16 mA,
T A = 25°C (7) (Figure 15)
6N135M
HCPL2530M
6N136M
HCPL4503M
0.23
0.25
1.5
0.8
μs
μs
HCPL2531M
R L = 4.1 k Ω , I F = 16 mA (6)
(Figure 15)
R L = 1.9 k Ω , I F = 16 mA (7)
(Figure 15)
6N135M
HCPL2530M
6N136M
HCPL4503M
2.0
1.0
μs
μs
HCPL2531M
t PLH
Propagation Delay
Time to Logic HIGH
T A = 25°C, (R L = 4.1 k Ω ,
I F = 16 mA (6) (Figure 15)
R L = 1.9 k Ω , I F = 16 mA (7) ,
6N135M
HCPL2530M
6N136M
0.45
0.26
1.5
0.8
μs
μs
T A = 25°C (Figure 15)
HCPL4503M
HCPL2531M
R L = 4.1 k Ω , I F = 16
mA (6)
6N135M
2.0
μs
(Figure 15)
HCPL2530M
R L = 1.9 k Ω , I F = 16 mA (7)
(Figure 15)
6N136M
HCPL4503M
1.0
μs
HCPL2531M
|CM H |
Common Mode
Transient
I F = 0 mA, V CM = 10 V P-P ,
R L = 4.1 k Ω , T A = 25°C (8)
6N135M
HCPL2530M
10,000
V/μs
Immunity at
(Figure 16)
Logic High
I F = 0 mA, V CM = 10 V P-P ,
R L = 1.9 k Ω , T A = 25°C (8)
6N136M
HCPL2531M
10,000
V/μs
(Figure 16)
I F = 0 mA, V CM = 1,500 V P-P ,
R L = 1.9 k Ω , T A = 25°C (8)
HCPL4503M
15,000
50,000
(Figure 16)
|CM L |
Common Mode
Transient
I F = 16 mA, V CM = 10 V P-P ,
R L = 4.1 k Ω , T A = 25°C (8)
6N135M
HCPL2530M
10,000
V/μs
Immunity at
(Figure 16)
Logic Low
I F = 16 mA, V CM = 10 V P-P ,
R L = 1.9 k Ω (8) (Figure 16)
I F = 0 mA, V CM = 1,500 V P-P ,
R L = 1.9 k Ω , T A = 25°C (8)
6N136M
HCPL2531M
HCPL4503M
15,000
10,000
50,000
V/μs
(Figure 16)
Notes:
6. The 4.1 k Ω load represents 1 LSTTL unit load of 0.36 mA and 6.1 k Ω pull-up resistor.
7. The 1.9 k Ω load represents 1 TTL unit load of 1.6 mA and 5.6 k Ω pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV cm /dt on the leading edge
of the common mode pulse signal V CM , to assure that the output will remain in a logic high state (i.e., V O > 2.0 V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dV cm /dt on the trailing edge
of the common mode pulse signal, V CM , to assure that the output will remain in a logic low state (i.e., V O < 0.8 V).
?2008 Fairchild Semiconductor Corporation
6N13XM, HCPLXXXM Rev. 1.0.11
6
www.fairchildsemi.com
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