参数资料
型号: 6N137M
厂商: Fairchild Optoelectronics Group
文件页数: 5/18页
文件大小: 0K
描述: OPTOCOUPLER 1CH LOG GATE 8-DIP
标准包装: 1,000
电压 - 隔离: 5000Vrms
通道数: 1,单向
电流 - 输出 / 通道: 50mA
数据速率: 10Mbps
传输延迟高 - 低 @ 如果: 40ns @ 7.5mA
电流 - DC 正向(If): 50mA
输入类型: DC
输出类型: 开路集电极
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-DIP
包装: 管件
其它名称: 6N137MFS
Electrical Characteristics (Continued)
Transfer Characteristics (T A = -40 to +85°C unless otherwise speci?ed)
Symbol
I OH
V OL
I FT
DC Characteristics
HIGH Level Output Current
LOW Level Output Current
Input Threshold Current
Test Conditions
V CC = 5.5 V, V O = 5.5 V,
I F = 250 μA, V E = 2.0 V (2)
V CC = 5.5 V, I F = 5 mA, V E = 2.0 V,
I CL = 13 mA (2)
V CC = 5.5 V, V O = 0.6 V, V E = 2.0 V,
Min.
Typ.*
0.4
3
Max.
100
0.6
5
Unit
μA
V
mA
I OL = 13 mA
Isolation Characteristics (T A = -40°C to +85°C unless otherwise speci?ed.)
Symbol
I I-O
Characteristics
Input-Output Insulation
Test Conditions
Relative humidity = 45%,
Min.
Typ.*
Max.
1.0*
Unit
μA
Leakage Current
T A = 25°C, t = 5 s,
V I-O = 3000 VDC (12)
V ISO
R I-O
Withstand Insulation Test
Voltage
Resistance (Input to Output)
RH < 50%, T A = 25°C,
I I-O ≤ 10 μA, t = 1 min. (12)
V I-O = 500 V (12)
5000
10 11
V RMS
Ω
C I-O
Capacitance (Input to Output)
f=1
MHz (12)
1
pF
*All Typicals at V CC = 5 V, T A = 25°C
Notes:
1. The V CC supply to each optoisolator must be bypassed by a 0.1 μF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V CC and GND pins of each device.
2. Each channel.
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
4. t PLH – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
5. t PHL – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
6. t r – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. t f – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. t ELH – Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9. t EHL – Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CM H – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
HIGH state (i.e., V OUT > 2.0 V). Measured in volts per microsecond (V/μs).
11. CM L – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
LOW output state (i.e., V OUT < 0.8 V). Measured in volts per microsecond (V/μs).
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
?2009 Fairchild Semiconductor Corporation
6N137M, HCPL26XXM Rev. 1.0.8
5
www.fairchildsemi.com
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