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参数资料
| 型号： | 709279L9PF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | SRAM |
| 英文描述： | 32K X 16 DUAL-PORT SRAM, 20 ns, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件页数： | 18/18页 |
| 文件大小： | 314K |
| 代理商： | 709279L9PF8 |
6.42
IDT709279/69S/L
Preliminary
High-Speed 32/16K x 16 Synchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
9
Timing Waveform of Read Cycle for Flow-Through Output
(FT/PIPE"X" = VIL)(3,7)
Timing Waveform of Read Cycle for Pipelined Output (FT/PIPE"X" = VIH)(3,7)
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. OE is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
3. ADS = VIL, CNTEN and CNTRST = VIH.
4. The output is disabled (High-Impedance state) by CE0 = VIH, CE1 = VIL, UB = VIH, or LB = VIH following the next rising edge of the clock. Refer to Truth Table 1.
5. Addresses do not have to be accessed sequentially since ADS = VIL constantly loads the address on the rising edge of the CLK; numbers
are for reference use only.
6. If UB or LB was HIGH, then the Upper Byte and/or Lower Byte of DATAOUT for Qn + 2 would be disabled (High-Impedance state).
7. "x" denotes Left or Right port. The diagram is with respect to that port.
An
An + 1
An + 2
An + 3
tCYC1
tCH1
tCL1
R/
W
ADDRESS
DATAOUT
CE0
CLK
OE
tSC
tHC
tCD1
tCKLZ
Qn
Qn + 1
Qn + 2
tOHZ
tOLZ
tOE
tCKHZ
3243 drw 07
(1)
(2)
CE1
UB, LB
(4)
tSB
tHB
tSW
tHW
tSA
tHA
tDC
(5)
tSC
tHC
tSB
tHB
An
An + 1
An + 2
An + 3
tCYC2
tCH2
tCL2
R/
W
ADDRESS
CE0
CLK
CE1
UB, LB
(4)
DATAOUT
OE
tCD2
tCKLZ
Qn
Qn + 1
Qn + 2
tOHZ
tOLZ
tOE
3243 drw 08
(1)
(2)
tSC
tHC
tSB
tHB
tSW
tHW
tSA
tHA
tDC
tSC
tHC
tSB
tHB
(5)
(1 Latency)
(6)
相关PDF资料 |
PDF描述 |
|---|---|
| IDT709279L12PFI8 | 32K X 16 DUAL-PORT SRAM, 25 ns, PQFP100 |
| 70C100BFIL | 110 A, SCR, TO-208AD |
| 70C100BIL | 110 A, SCR, TO-209AC |
| 70C120BFIL | 110 A, SCR, TO-208AD |
| 70C120BIL | 110 A, SCR, TO-209AC |
相关代理商/技术参数 |
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| 709279L9PFG8 | 功能描述:IC SRAM 512KBIT 100TQFP 制造商:idt, integrated device technology inc 系列:* 零件状态:初步 标准包装:750 |
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| 709279S12PF8 | 功能描述:静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| 709279S12PFI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Sync Dual 5V 512K-Bit 32K x 16 25ns/12ns 100-Pin TQFP 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Sync Dual 5V 512K-Bit 32K x 16 25ns/12ns 100-Pin TQFP Tray 制造商:Integrated Device Technology Inc 功能描述:SRAM SYNC DUAL 5V 512KBIT 32KX16 25NS/12NS 100TQFP - Bulk |
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