参数资料
型号: 71M6513H-IGTR/F
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封装: LEAD FREE, LQFP-100
文件页数: 55/104页
文件大小: 1390K
代理商: 71M6513H-IGTR/F
71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 54 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
Power-Up: After power-up, the 71M6513/6513H is in reset as long as V1 < VBIAS. As soon as V1 exceeds VBIAS, the reset
timer is started which takes the MPU out of reset after 4100 oscillator cycles (see Figure 20). The MPU then initiates its pre-
boot phase lasting 32 cycles. The supply current will be low but not zero during power-up. It will increase, once V1 exceeds
VBIAS and will increase to the nominal value once the preboot phase starts. The supply current may then be reduced under
firmware control, following the steps specified in Battery Operation and Power Save Modes.
Figure 20: Timing Diagram for Voltages, Current and Operation Modes after Power-Up
Battery Operation
When V1 is lower than VBIAS, the external battery will power the following parts of the 71M6513/6513H:
RTC
Crystal oscillator circuitry
MPU XRAM
WD_OVF bit
Power Save Modes
In normal mode of operation, running on 3.3V supply, various resources of the 71M6513/6513H may be shut down by the
MPU firmware in order to reduce power consumption while other essential resources such as UARTs may remain active.
Table 59 outlines these resources and their typical current consumption (based on initial condition MPU_DIV = 0).
Power Saving Measure
Software Control
Typical
Savings
Disable the CE
CE_EN = 0
0.16mA
Disable the ADC
ADC_DIS = 1
1.8mA
Disable clock test output CKTEST
CKOUTDIS = 1
0.6mA
Disable emulator clock
ECK_DIS = 1 *)
0.1mA
Set flash read pulse timing to 33 ns
FLASH66Z =1
0.04mA
Disable the LCD voltage boost circuitry
LCD_BSTEN = 0
0.9mA
Disable RTM outputs
RTM_EN = 0
0.01mA
Increase the clock divider for the MPU
MPU_DIV = X
0.4mA/MHz
*) This bit is to be used with caution! Inadvertently setting this bit will inhibit access to the part with the ICE interface and thus
preclude flash erase and programming operations.
Table 59: Power Saving Measures
V3P3
V1
SUPPLY CURRENT
3.3V
1.5V
PRE-
BOOT
RESET TIMER
FIRMWARE HAS CONTROL OVER CHIP...
1ms
0V
V2P5
POWER
DOWN
V1 > VBIAS
PWR
UP
0mA
nominal
125ms
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