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| 型号： | 71M6532D-IGT/F |
| 厂商： | Maxim Integrated |
| 文件页数： | 12/121页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER 128KB 100-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 90 |
| 系列： | * |
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Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
The duration of each multiplexer state depends on the number of ADC samples processed by the FIR,
which is set by FIR_LEN[1:0] . Each multiplexer state will start on the rising edge of CK32. The MUX_CTRL
signal sends an FIR_START command to begin the calculation of a sample value from the ADC bit
stream by the FIR. Upon receipt of the FIR_DONE signal from the FIR, the multiplexer will wait until the
next CK32 rising edge to increment its state and initiate the next FIR conversion. FIR conversions require
1, 2, or 3 CK32 cycles. The number of CK32 cycles is determined by FIR_LEN[1:0] , as shown in Table 2 .
1.2.3
A/D Converter (ADC)
A single delta-sigma A/D converter digitizes the voltage and current inputs to the 71M6531D/F and
71M6532D/F. The resolution of the ADC is programmable using the I/O RAM M40MHZ and M26MHZ bits
(see Table 2 ). The CE code must be tailored for use with the selected ADC resolution.
Table 2: ADC Resolution
Setting for
[ M40MHZ, M26MHZ ]
[00], [10] or [11]
[01]
FIR_LEN[1:0]
0
1
2
0
1
2
CK32
Cycles
1
2
3
1
2
3
FIR CE Cycles
138
288
384
186
384
588
Resolution
18 bits
21 bits
22 bits
19 bits
22 bits
24 bits
Initiation of each ADC conversion is controlled by MUX_CTRL as described above. At the end of each
ADC conversion, the FIR filter output data is stored into the CE RAM location determined by the MUX
selection.
1.2.4
FIR Filter
The finite impulse response filter is an integral part of the ADC and it is optimized for use with the multiplexer.
The purpose of the FIR filter is to decimate the ADC output to the desired resolution. At the end of each
ADC conversion, the output data is stored into the fixed CE RAM location determined by the multiplexer
selection as shown in Table 3 . FIR data is stored LSB justified, but shifted left by eight bits.
Table 3: ADC RAM Locations
1.2.5
Address (HEX)
0x00
0x01
0x02
0x03
Voltage References
Name
IA
VB
IB
VA
Address (HEX)
0x09
0x0A
0x0B
Name
AUX
TEMP
VBAT
The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques.
The reference is trimmed to minimize errors caused by component mismatch and drift. The result is a
voltage output with a predictable temperature coefficient.
The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU using
CHOP_E[1:0] ( IORAM 0x2002[5:4 ]). The CHOP_E[1:0] field enables the MPU to operate the chopper circuit
in regular or inverted operation, or in toggling mode. When the chopper circuit is toggled in between
multiplexer cycles, DC offsets on the measured signals will automatically be averaged out.
12
Rev 2
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 71M6532D-IGTR/F | 功能描述:计量片上系统 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6532D-IGTR/F1 | 功能描述:计量片上系统 - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6532F | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Energy Meter IC |
| 71M6532F-IGT/F | 功能描述:计量片上系统 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6532F-IGT/F1 | 功能描述:计量片上系统 - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
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