参数资料
型号: 71M6534H-DB
厂商: Maxim Integrated Products
文件页数: 43/132页
文件大小: 0K
描述: BOARD DEMO 71M6534H
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 电源管理,电度表/功率表
嵌入式:
已用 IC / 零件: *
主要属性: 三相功率表
已供物品: 2 个板,线缆,CD,电源
FDS_6533_6534_004
71M6533/G/H and 71M6534/H Data Sheet
On reset or power-up, all DIO pins are inputs until they are configured for the desired direction under
MPU control. The pin function can be configured by the I/O RAM bits LCD_BITMAPn . Setting
LCD_BITMAPn = 1 configures the pin for LCD, setting LCD_BITMAPn = 0 configures it for DIO.
Once a pin is configured as DIO, it can be configured independently as an input or output with the
DIO_DIR bits or the LCD_SEGn registers. Input and output data are written to or read from the pins using
SFR registers P0, P1 , and P2 .
Table 39 through
Table 42 shows all the DIO pins with their configuration, direction control and data registers. Table
entries marked with an asterisk and grayed are applicable to the 71M6534 only.
Table 39: Data/Direction Registers and Internal Resources for DIO 1-15
DIO
LCD Segment
71M6533 Pin #
71M6534 Pin #
Configuration (DIO
or LCD segment)
PB 1 2
– – –
97 91 3
114 109 3
Always DIO
3
17
22
4
24
60
70
0
5
25
61
71
1
6 7 8 9
26 27 28 29
62 63 67 68
72 73 77 78
2 3 4 5
LCD_BITMAP[31:24]
10
30
69
79
6
11 12* 13 14 15
31 32* 33 34 35
70 – 44 29 30
80 120 50 35 36
7 0* 1 2 3
LCD_BITMAP[39:32]
Data Register
Direction Register
0 = input, 1 = output
0
1
1
2 3 4 5
DIO0 = P0 ( SFR   0x80 )
2 3 4 5
DIO_DIR0 (SFR 0xA2 )
6
6
7
7
0
0
1
1
2 3 4* 5
DIO1 = P1 ( SFR 0x90)
2 3 4* 5
DIO_DIR1 ( SFR 0x91)
6
6
7
7
Internal Resources
Configurable
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Table 40: Data/Direction Registers and Internal Resources for DIO 16-30
DIO
LCD Segment
71M6533 Pin #
71M6534 Pin #
Configuration (DIO
or LCD segment)
16 17 18 19
36 37 38 39
33 12 13 64
39 17 18 74
4 5 6 7
LCD_BITMAP[39:32]
20
40
65
75
0
21 22* 23 24 25
41 42* 43 44 45
66 – 54 46 43
76 115 64 52 49
1 2* 3 4 5
LCD_BITMAP[47:40]
26
46
42
48
6
27 28* 29 30 –
47 48* 49 50 –
41 – 32 35 –
47 81 38 41
7 0* 1 2 –
LCD_BITMAP[55:48]
Data Register
0
1
2 3 4 5
DIO2 = P2 ( SFR 0xA0)
6*
7
0
1
2 3 4* 5
DIO3 = P3 ( SFR 0xB0)
6
0
1
2
3
4
5
6*
7
Direction Register
0 = input, 1 = output
Rev 2
DIO_DIR2 (SFR 0xA1)
43
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