参数资料
型号: 73M1903-EVM-600
厂商: Maxim Integrated Products
文件页数: 37/47页
文件大小: 0K
描述: BOARD DEMO 73M1903 PPU USA/JAPAN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 接口,模拟前端(AFE)
已用 IC / 零件: *
主要属性: *
次要属性: *
已供物品: *
73M1903 Data Sheet
DS_1903_032
42
Rev. 2.1
Appendix B – Crystal Oscillator
The crystal oscillator is designed to operate over wide choice of crystals (from 9 MHz to 27 MHz). The
crystal oscillator output is input to an NCO based pre-scaler (divider) prior to being passed onto an on-
chip PLL. The intent of the pre-scaler is to convert the crystal oscillator frequency, Fxtal, to a convenient
frequency to be used as a reference frequency, Fref, for the PLL. A set of three numbers– Pdvsr (5 bit),
Prst (3 bit) and Pseq (8 bit) must be entered through the serial port as follows:
Pdvsr = Integer [Fref/Fxtal];
Prst = Denominator of the ratio (Fref/Fxtal) minus 1 when it is expressed as a ratio of two smallest
integers = Nnco1/Dnco1;
Pseq = Divide Sequence
Fxtal
mux
count ctrl
overflow
Counter
Pdvsr
Pdvsr +1
Sequence
Register
Rst
Sequence
Counter
Fref
Pseq[7:0]
Prst[2:0]
Figure 17: NCO Block Diagram
Note that in all cases, pre-scaler should be designed such that pre-scaler output frequency, Fref, is in the
range of 2 ~ 4 MHz.
In the first example below, the exact divide ratio required is Fxtal/Fref = 15.625 =125/8. If a divide
sequence of {
÷16,÷16,÷15,÷16,÷16,÷15,÷16,÷15} is repeated, the effective divide ratio would be exactly
15.625. Consequently, Pdvsr of 15, the length of the repeating pattern, Prst = 8 –1 =7, and the pattern,
{1,1,0,1,1,0,1,0}, where 0 means Pdvsr, or
÷15, and 1 means Pdvsr +1, or ÷16 must be entered as below.
Example 1:
Fxtal = 27 MHz, Fref = 1.728 MHz.
Pdvsr = Integer [Fxtal/Fref] = 15 =0Fh
Prst[2:0] = 8 – 1 = 7 from Fxtal/Fref = 15.625 =125/8;
Pseq =
÷16,÷16,÷15,÷16,÷16,÷15,÷16,÷15 => {1,1,0,1,1,0,1,0} =DAh.
In the second example, Fxtal/Fref =4.0. This is a constant divide by 4. Thus Pdvsr is 4, Prst = 1 –1
=0 and Pseq = {x,x,x,x,x,x,x,x).
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