参数资料
型号: 74AHC259
厂商: NXP Semiconductors N.V.
英文描述: 8-bit addressable latch(8位可寻址锁存器)
中文描述: 8位可寻址锁存器(8位可寻址锁存器)
文件页数: 2/20页
文件大小: 95K
代理商: 74AHC259
2000 Mar 14
2
Philips Semiconductors
Product specification
8-bit addressable latch
74AHC259;
74AHCT259
FEATURES
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger actions
Combines demultiplexer and 8-bit latch
Serial-to-parallel capability
Output from each storage bit available
Random (addressable) data entry
Easily expandable
Common reset input
Useful as a 3-to-8 active HIGH decoder
Inputs accept voltages higher than V
CC
For AHC only: operates with CMOS input levels
For AHCT only: operates with TTL input levels
Specified from
40 to +85
°
C and from
40 to +125
°
C.
DESCRIPTION
The 74AHC/AHCT259 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT259 are high-speed 8-bit addressable
latches designed for general purpose storage applications
in digital systems. The ‘259’ are multifunctional devices
capable of storing single-line data in eight addressable
latches, and also 3-to-8 decoder and demultiplexer, with
active HIGH outputs (Q0 to Q7), functions are available.
The ‘259’ also incorporates an active LOW common reset
(MR) for resetting all latches as well as an active LOW
enable input (LE).
The ‘259’ has four modes of operation as shown in the
mode select table. In the addressable latch mode, data on
the data line (D) is written into the addressed latch. The
addressed latch will follow the data input with all non-
addressed latches remaining in their previous states.
In the memory mode, all latches remain in their previous
states and are unaffected by the data or address inputs.
In the 3-to-8 decoding or demultiplexing mode, the
addressed output follows the state of the (D) input with all
other outputs in the LOW state. In the reset mode all
outputs are LOW and unaffected by the address
(A0 to A2) and data (D) input. When operating the ‘259’ as
an address latch, changing more than one bit of the
address could impose a transient-wrong address.
Therefore, this should only be done while in the memory
mode.
The mode select table summarizes the operations of
the ‘259’.
相关PDF资料
PDF描述
74AHCT273 Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 85
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相关代理商/技术参数
参数描述
74AHC259_08 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit addressable latch
74AHC259D 功能描述:闭锁 8-BIT ADDRESS LATCH RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel
74AHC259D,112 功能描述:闭锁 8-BIT ADDRESS LATCH RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel
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