参数资料
| 型号： | 74AHC74PW,118 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 1/14页 |
| 文件大小： | 0K |
| 描述： | IC DUAL D F-F POS-EDGE 14TSSOP |
| 产品培训模块： | Logic Packages |
| 标准包装： | 2,500 |
| 系列： | 74AHC |
| 功能： | 设置（预设）和复位 |
| 类型： | D 型 |
| 输出类型： | 差分 |
| 元件数： | 2 |
| 每个元件的位元数： | 1 |
| 频率 - 时钟： | 75MHz |
| 延迟时间 - 传输： | 7.4ns |
| 触发器类型： | 正边沿 |
| 输出电流高，低： | 8mA，8mA |
| 电源电压： | 2 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
| 其它名称： | 954-74AHC74PW,118CHP 954-74AHC74PW118CHP |
1.
General description
The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL). It is specied in compliance with JEDEC standard
No. 7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type ip-op with individual
data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has
complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the
clock input. Information on the data input is transferred to the Q output on the LOW to
HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to
the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock
rise and fall times.
2.
Features
I Balanced propagation delays
I All inputs have Schmitt-trigger actions
I Inputs accept voltages higher than VCC
I Input levels:
N For 74AHC74: CMOS level
N For 74AHCT74: TTL level
I ESD protection:
N HBM EIA/JESD22-A114E exceeds 2000 V
N MM EIA/JESD22-A115-A exceeds 200 V
N CDM EIA/JESD22-C101C exceeds 1000 V
I Multiple package options
I Specied from 40 °C to +85 °C and from 40 °C to +125 °C
74AHC74; 74AHCT74
Dual D-type ip-op with set and reset; positive-edge trigger
Rev. 05 — 9 June 2008
Product data sheet
相关PDF资料 |
PDF描述 |
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| TXR18AB00C2005AI | ADPTR TINEL LOCK STR SHELL 20 |
| 74AHC74PW,112 | IC DUAL D F-F POS-EDGE 14TSSOP |
| SY100E104JC TR | IC GATE AND/NAND QUINT 28-PLCC |
| SY100E101JI TR | IC GATE OR/NO QUAD 4INPUT 28PLCC |
| TXR21AB00-1004AI | ADPTR TINEL LOCK STR SHELL 10 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 74AHC74PWDH | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Dual D-type flip-flop with set and reset; positive-edge trigger |
| 74AHC74PW-Q100J | 制造商:NXP Semiconductors 功能描述:74AHC74PW-Q100/TSSOP14/REEL13/ 制造商:NXP Semiconductors 功能描述:74AHC74PW-Q100/TSSOP14/REEL13/ - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP-FLOP SET/RESET 14TSSOP |
| 74AHC74PW-T | 功能描述:触发器 DUAL D-TYPE FLIPFLOP RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74AHC86 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad 2-input EXCLUSIVE-OR gate |
| 74AHC86BQ | 制造商:NXP Semiconductors 功能描述:IC QUAD 2 I/P EX-OR GATE DH |
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