参数资料
型号: 74AHCT74PWDH
厂商: NXP SEMICONDUCTORS
元件分类: 通用总线功能
英文描述: Dual D-type flip-flop with set and reset; positive-edge trigger
中文描述: AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封装: PLASTIC, TSSOP-14
文件页数: 9/20页
文件大小: 92K
代理商: 74AHCT74PWDH
1999 Sep 23
9
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74AHC74; 74AHCT74
Notes
1.
2.
Typical values at V
CC
= 3.3 V.
Typical values at V
CC
= 5.0 V.
V
CC
= 4.5 to 5.5 V;
note 2
t
PHL
/t
PLH
propagation delay
nCP to nQ, nQ
propagation delay
nS
D
nR
D
to nQ, nQ
maximum clock
pulse frequency
propagation delay
nCP to nQ, nQ
propagation delay
nS
D
to nQ, nQ
clock pulse width
HIGH or LOW
set or reset pulse
width LOW
removal time set or
reset
set-up time
nD to nCP
hold time
nD to nCP
maximum clock
pulse frequency
see Figs 6 and 8
15 pF
3.7
7.3
1.0
8.5
1.0
9.5
ns
see Figs 7 and 8
3.7
7.7
1.0
9.0
1.0
10.0
ns
f
max
130
170
110
110
ns
t
PHL
/t
PLH
see Figs 6 and 8
50 pF
5.2
9.3
1.0
10.5
1.0
12.0
ns
see Figs 7 and 8
5.3
9.7
1.0
11.0
1.0
12.5
ns
t
W
see Figs 6 and 8
5.0
5.0
5.0
ns
see Figs 7 and 8
5.0
5.0
5.0
ns
t
rem
3.0
3.0
3.0
ns
t
su
see Figs 6 and 8
5.0
5.0
5.0
ns
t
h
0.5
0.5
0.5
ns
f
max
90
115
75
75
ns
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
(
°
C)
UNIT
WAVEFORMS
C
L
25
40 to +85
40 to +125
MIN.
TYP.
MAX. MIN. MAX.
MIN.
MAX.
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