参数资料
型号: 74ALS112
厂商: NXP Semiconductors N.V.
英文描述: Dual J-K negative edge-triggered flip-flop
中文描述: 双JK负边沿触发器
文件页数: 3/10页
文件大小: 92K
代理商: 74ALS112
Philips Semiconductors
Product specification
74ALS112A
Dual J-K negative edge-triggered flip-flop
1996 Jun 27
3
LOGIC DIAGRAM
5, 9
4, 10
2, 12
1, 13
6, 7
15, 14
3, 11
Qn
SDn
Kn
Qn
RDn
Jn
CPn
SF00106
V
= Pin 16
GND = Pin 8
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
SD
RD
CP
J
K
Q
Q
L
H
X
X
X
H
L
Asynchronous Set
H
L
X
X
X
L
H
Asynchronous Reset
L
L
X
X
X
H*
H*
Undetermined *
H
H
h
h
q
q
Toggle
H
H
h
l
H
L
Load “1” (Set)
H
H
l
h
L
H
Load “0” (Reset)
H
H
l
l
q
q
Hold “no change”
H
H
H
X
X
q
q
Hold “no change”
H =
h
L
l
q
X =
*
Asynchronous inputs: Low input to SD sets Q to High level, Low input to RD sets Q to Low level. Set and reset are independent of clock.
Simultaneous Low on both SD and RD makes both Q and Q High.
High voltage level
High state must be present one setup time prior to High-to-Low clock transition
Low voltage level
Low state must be present one setup time prior to High-to-Low clock transition
Lower case indicate the state of the referenced output prior to the High-to-Low clock transition
Don’t care
High-to-Low clock transition
Both outputs will be High while both SD and RD are Low, but the output states are unpredictable if SD and RD go High simultaneously
=
=
=
=
=
=
相关PDF资料
PDF描述
74ALS112A Dual J-K negative edge-triggered flip-flop
74ALS112AD Dual J-K negative edge-triggered flip-flop
74ALS112AN Dual J-K negative edge-triggered flip-flop
74ALS11AD Triple 3-Input AND gate
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相关代理商/技术参数
参数描述
74ALS112A 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Dual J-K negative edge-triggered flip-flop
74ALS112AD 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Dual J-K negative edge-triggered flip-flop
74ALS112AN 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Dual J-K negative edge-triggered flip-flop
74ALS11A 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Triple 3-Input AND gate
74ALS11AD 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Triple 3-Input AND gate